On Fri, 21 Aug 2020, at 11:34 AM, Masahisa Kojima via Asa-dev wrote:
Hi all,
I make StandaloneMM with secure varstore work on SBSA-QEMU.
One item I would like to discuss is the location of non-secure shared memory between UEFI and Secure-EL0(StandaloneMM).
For StandaloneMM, non-secure shared memory must be defined in compile time, because there is no method to know the shared memory address between uefi and tf-a in runtime.
I maybe missing something here, but ARM-TF can and does pass on a DT to edk2, can this not be defined there?
Graeme
I allocated this non-secure shared memory at the bottom of the DRAM, because DRAM size varies depending on the QEMU parameter.
DRAM layout is as follows(when the DRAM size is 1GB) 0x10000000000 - 0x10000FFFFFF(16MB) non-secure shared memory for StandaloneMM 0x10001000000 - 0x1003FFFFFFF(1GB - 16MB)
Does anyone have comments on this? My concern is allocating something at the bottom of the DRAM is not the usual implementation? # Other packages like SGI allocate it at the top of DRAM. https://github.com/tianocore/edk2-platforms/blob/master/Platform/ARM/SgiPkg/...
--- patch --- diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 7d9a9cc50bf3..7ec5669615f0 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -387,7 +387,8 @@ [PcdsFixedAtBuild.common] gArmTokenSpaceGuid.PcdVFPEnabled|1
# System Memory Base -- fixed
- gArmTokenSpaceGuid.PcdSystemMemoryBase|0x10000000000
- gArmTokenSpaceGuid.PcdSystemMemoryBase|0x10001000000
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c index 8c2eb0b6a028..7af9f5a4a1dc 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c @@ -73,8 +73,13 @@ SbsaQemuLibConstructor ( } }
- // For StandaloneMM Non-Secure Shared buffer, reserve 16MB
- // at the bottom of DRAM.
- NewSize -= 0x1000000;
- // Make sure the start of DRAM matches our expectation
- ASSERT (FixedPcdGet64 (PcdSystemMemoryBase) == NewBase);
- // remove base address check
+// ASSERT (FixedPcdGet64 (PcdSystemMemoryBase) == NewBase); PcdStatus = PcdSet64S (PcdSystemMemorySize, NewSize);
Regards, Masahisa -- Asa-dev mailing list Asa-dev@op-lists.linaro.org https://op-lists.linaro.org/mailman/listinfo/asa-dev
On Fri, 21 Aug 2020 at 19:37, Graeme Gregory graeme@bisexual.ninja wrote:
On Fri, 21 Aug 2020, at 11:34 AM, Masahisa Kojima via Asa-dev wrote:
Hi all,
I make StandaloneMM with secure varstore work on SBSA-QEMU.
One item I would like to discuss is the location of non-secure shared memory between UEFI and Secure-EL0(StandaloneMM).
For StandaloneMM, non-secure shared memory must be defined in compile time, because there is no method to know the shared memory address between uefi and tf-a in runtime.
I maybe missing something here, but ARM-TF can and does pass on a DT to edk2, can this not be defined there?
Hi Graeme,
Thank you for your quick comment. Yes, it is possible. I will create patches for both tf-a and edk2 and get reviewed.
Thank you! Masahisa
Graeme
I allocated this non-secure shared memory at the bottom of the DRAM, because DRAM size varies depending on the QEMU parameter.
DRAM layout is as follows(when the DRAM size is 1GB) 0x10000000000 - 0x10000FFFFFF(16MB) non-secure shared memory for StandaloneMM 0x10001000000 - 0x1003FFFFFFF(1GB - 16MB)
Does anyone have comments on this? My concern is allocating something at the bottom of the DRAM is not the usual implementation? # Other packages like SGI allocate it at the top of DRAM.
https://github.com/tianocore/edk2-platforms/blob/master/Platform/ARM/SgiPkg/...
--- patch --- diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 7d9a9cc50bf3..7ec5669615f0 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -387,7 +387,8 @@ [PcdsFixedAtBuild.common] gArmTokenSpaceGuid.PcdVFPEnabled|1
# System Memory Base -- fixed
- gArmTokenSpaceGuid.PcdSystemMemoryBase|0x10000000000
- gArmTokenSpaceGuid.PcdSystemMemoryBase|0x10001000000
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c index 8c2eb0b6a028..7af9f5a4a1dc 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuMem.c @@ -73,8 +73,13 @@ SbsaQemuLibConstructor ( } }
- // For StandaloneMM Non-Secure Shared buffer, reserve 16MB
- // at the bottom of DRAM.
- NewSize -= 0x1000000;
- // Make sure the start of DRAM matches our expectation
- ASSERT (FixedPcdGet64 (PcdSystemMemoryBase) == NewBase);
- // remove base address check
+// ASSERT (FixedPcdGet64 (PcdSystemMemoryBase) == NewBase); PcdStatus = PcdSet64S (PcdSystemMemorySize, NewSize);
Regards, Masahisa -- Asa-dev mailing list Asa-dev@op-lists.linaro.org https://op-lists.linaro.org/mailman/listinfo/asa-dev
-
Graeme Gregory -
Masahisa Kojima