There is a patch for changing MPIDR_EL1 handling on qemu-devel ML [1]
which (if merged) will force us to do changes to SBSA-ref in QEMU, TF-A
and probably EDK2 too.
1.
https://lore.kernel.org/qemu-devel/20240419183135.12276-1-dorjoychy111@gmai…
Details:
MPIDR_EL1 register keeps cpu topology information. There are 2 or 4 8bit
fields called Aff0-Aff3.
For now Aff0 and Aff1 are used in QEMU:
Aff0 - keeps core number (8 cores per cluster)
Aff1 - keeps cluster number
The plan is to use 0/1 for cores below Neoverse-N1 and 0-3 on higher
ones with Aff0 being 0 as it is used for threads which are forbidden in
designed emulated by QEMU.
So whole topology can be stored:
Aff0 - thread
Aff1 - core
Aff2 - cluster
Aff3 - socket
What it means for us?
First of all: platform version MAJOR bump. So we would have
platform_version = 1.0 as virtual hardware changes force firmware changes.
Second: TF-A freeze is coming. Would be good to not have to wait for
November and 2.12 release.
We need to drop sbsa_topology.c from TF-A as it assumes Aff0/1 way and
errors out on Aff0-3 way.
Generation of PPTT in EDK2 needs to be changed too. Good side is that we
may drop DT/SMC way and read socket/cluster/core/thread from MPIDR_EL1
directly.
To make things easier I would like to drop support for Cortex-A57/A72
from sbsa-ref. They have Aff0/1 only and would require special handling
in firmware. We would need it anyway as people tend to use misc versions
of QEMU but this way code will get less and less used. And v8.2 will be
minimal version.
Opinions?
