Hi, long time no mail so let me tell you how our merge queue looks:
1. Leif wrote patchset for TF-A to add 'max' cpu support.
This gives us CPU with all/most features supported in QEMU. Compared to 'cortex-a72' we use now we get some tests pass for level 4 and above.
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/9112
Code to enable 'max' cpu model for sbsa-ref is already merged into QEMU tree.
Passed tests:
20 : Check for 16-Bit VMID : Result: PASS 21 : Check for Virtual host extensions : Result: PASS 22 : Check for pointer signing : Result: PASS 27 : Check for SHA3 and SHA512 support : Result: PASS 31 : Check PEs Implement SB Barrier : Result: PASS 32 : Check PE Impl CFP,DVP,CPP RCTX : Result: PASS 33 : Check Branch Target Support : Result: PASS
2. I sent patch to QEMU to bump amount of PMU counters to six (required by both BSA and SBSA).
https://lists.gnu.org/archive/html/qemu-devel/2021-03/msg01012.html
Patch was discussed and then Peter Maydell proposed patch which handles that per CPU model.
https://lists.gnu.org/archive/html/qemu-devel/2021-03/msg04065.html
Passed tests:
12 : Check number of PMU counters : Result: PASS
3. GIT ITS enablement done by Shashi.
This work has two parts: QEMU and EDK2.
https://lists.gnu.org/archive/html/qemu-devel/2021-03/msg05315.html
https://edk2.groups.io/g/devel/message/72682?p=,,,20,0,0,0::Created,,shashi,...
This allows us to pass ITS related tests and allows us to add SMMU handling.
Passed tests:
102 : If PCIe, then GIC implements ITS : Result: PASS