Hi,

There has been some discussion on the card QEMU-414:

https://projects.linaro.org/browse/QEMU-414

about adding another CPU model to QEMU that is somewhat more advanced than the current v8.0 offerings but isn't quite the rolling "all the ARM you can eat" -cpu max. So far the primary interest I'm aware of has come from people working on the SBSA and BSA reference platforms who want to have something with a few more features than the base v8.0 spec which we have covered.

So far we have been mostly focused on adding architectural features that are of direct interest to kernel and user space developers. This has allowed testing of code that uses SVE, MTE and BTI instructions. However there are no real CPUs that have quite the "random" assortment of ARM features QEMU currently implements.

Implementing a new CPU model is not free either. We would have to back fill features we have currently skipped - some fairly simple and others not so much. We might also have to implement new on-chip devices (for example GICv4). We are also not interested in implementing a "only in QEMU" chip that has no real world analogue.

However to decide on real world chip to model we need to gather requirements about what is it potential users need in this model? What architectural features are most interesting and what real world chip meets them?

I would like to here any feedback and maybe this could be a topic for a future sync-up call?