- Add the following ACPI tables for the SBSAQemu platform DSDT, FADT, GTDT, SPCR - Created an Include directory to hold common header files. - Also included the Acpiview shell utility.

Co-authored-by: Graeme Gregory graeme.gregory@linaro.org Co-authored-by: Jonathan Cameron jonathan.cameron@huawei.com Signed-off-by: Tanmay Jagdale tanmay.jagdale@linaro.org --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 + Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 8 + Silicon/Qemu/SbsaQemu/Acpi.dsc.inc | 35 ++++ .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 45 ++++++ Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 150 ++++++++++++++++++ Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc | 80 ++++++++++ Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 67 ++++++++ Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc | 53 +++++++ .../SbsaQemuPlatformDxe.inf | 1 - .../Include/IndustryStandard/SbsaQemuAcpi.h | 31 ++++ Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 +- 11 files changed, 477 insertions(+), 3 deletions(-) create mode 100644 Silicon/Qemu/SbsaQemu/Acpi.dsc.inc create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc create mode 100644 Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h

diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 4db3ab465163..4739443cae93 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -516,6 +516,7 @@ [Components.common] ShellPkg/Application/Shell/Shell.inf { <LibraryClasses> ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf + NULL|ShellPkg/Library/UefiShellAcpiViewCommandLib/UefiShellAcpiViewCommandLib.inf NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf @@ -675,3 +676,8 @@ [Components.common] MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf + + # + # ACPI Support +!include Silicon/Qemu/SbsaQemu/Acpi.dsc.inc + MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf index be7c78acebfd..4526eaaa02c5 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf @@ -227,6 +227,14 @@ [FV.FvMain] INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf

+ # + # ACPI support + # + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF RuleOverride = ACPITABLE Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf + INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf + # # PCI support # diff --git a/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc b/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc new file mode 100644 index 000000000000..c4a8d7a27b78 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc @@ -0,0 +1,35 @@ +# +# Copyright (c) 2020, Linaro Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################ + +[PcdsFeatureFlag] + gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE + +[PcdsFixedAtBuild.common] + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId|"LINARO" + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId|0x554D455141534253 #SBSAQEMU + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision|0x20200810 + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c #LNRO + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1 + +################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform +# +################################################################################ + +[Components.common] + # + # ACPI support + # + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf new file mode 100644 index 000000000000..ee524895524e --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf @@ -0,0 +1,45 @@ +## @file +# +# ACPI table data and ASL sources required to boot the platform. +# +# Copyright (c) 2020, Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = SbsaAcpiTables + FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD + MODULE_TYPE = USER_DEFINED + VERSION_STRING = 1.0 + +[Sources] + Dsdt.asl + Fadt.aslc + Gtdt.aslc + Spcr.aslc + +[Packages] + ArmPlatformPkg/ArmPlatformPkg.dec + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[FixedPcd] + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase + + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum + + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl new file mode 100644 index 000000000000..e92293fafb95 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl @@ -0,0 +1,150 @@ +/** @file +* Differentiated System Description Table Fields (DSDT). +* +* Copyright (c) 2020, Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include <IndustryStandard/SbsaQemuAcpi.h> + +#define LINK_DEVICE(Uid, LinkName, Irq) \ + Device(LinkName) { \ + Name(_HID, EISAID("PNP0C0F")) \ + Name(_UID, Uid) \ + Name(_PRS, ResourceTemplate() { \ + Interrupt(ResourceProducer, Level, ActiveHigh, Exclusive) { Irq } \ + }) \ + Method (_CRS, 0) { Return (_PRS) } \ + Method (_SRS, 1) { } \ + Method (_DIS) { } \ + } + +#define PRT_ENTRY(Address, Pin, Link) \ + Package (4) { \ + Address, Pin, Link, Zero \ + } + +DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "LINARO", "SBSAQEMU", + FixedPcdGet32 (PcdAcpiDefaultOemRevision)) { + Scope (_SB) { + // UART PL011 + Device (COM0) { + Name (_HID, "ARMH0011") + Name (_UID, Zero) + Name (_CRS, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x60000000, 0x00001000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 33 } + }) + } + + // AHCI Host Controller + Device(AHC0) { + Name(_HID, "LNRO001E") + Name(_CLS, Package (3) { + 0x01, + 0x06, + 0x01, + }) + Name(_CCA, 1) + Name(_CRS, ResourceTemplate() { + Memory32Fixed(ReadWrite, 0x60100000, 0x1000) + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 42 } + }) + } + + // USB EHCI Host Controller + Device(USB0){ + Name(_HID, "LNRO0D20") + Name(_CID, "PNP0D20") + + Method(_CRS, 0x0, Serialized){ + Name(RBUF, ResourceTemplate(){ + Memory32Fixed(ReadWrite, 0x60110000, 0x00010000) + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 } + }) + Return(RBUF) + } + + // Root Hub + Device(RHUB){ + Name(_ADR, 0x00000000) // Address of Root Hub should be 0 as per ACPI 5.0 spec + + // Ports connected to Root Hub + Device(HUB1){ + Name(_ADR, 0x00000001) + Name(_UPC, Package(){ + 0x00, // Port is NOT connectable + 0xFF, // Don't care + 0x00000000, // Reserved 0 must be zero + 0x00000000 // Reserved 1 must be zero + }) + + Device(PRT1){ + Name(_ADR, 0x00000001) + Name(_UPC, Package(){ + 0xFF, // Port is connectable + 0x00, // Port connector is A + 0x00000000, + 0x00000000 + }) + Name(_PLD, Package(){ + Buffer(0x10){ + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + } + }) + } // USB0_RHUB_HUB1_PRT1 + Device(PRT2){ + Name(_ADR, 0x00000002) + Name(_UPC, Package(){ + 0xFF, // Port is connectable + 0x00, // Port connector is A + 0x00000000, + 0x00000000 + }) + Name(_PLD, Package(){ + Buffer(0x10){ + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + } + }) + } // USB0_RHUB_HUB1_PRT2 + + Device(PRT3){ + Name(_ADR, 0x00000003) + Name(_UPC, Package(){ + 0xFF, // Port is connectable + 0x00, // Port connector is A + 0x00000000, + 0x00000000 + }) + Name(_PLD, Package(){ + Buffer(0x10){ + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + } + }) + } // USB0_RHUB_HUB1_PRT3 + + Device(PRT4){ + Name(_ADR, 0x00000004) + Name(_UPC, Package(){ + 0xFF, // Port is connectable + 0x00, // Port connector is A + 0x00000000, + 0x00000000 + }) + Name(_PLD, Package(){ + Buffer(0x10){ + 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + } + }) + } // USB0_RHUB_HUB1_PRT4 + } // USB0_RHUB_HUB1 + } // USB0_RHUB + } // USB0 + + } // Scope (_SB) +} diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc new file mode 100644 index 000000000000..894b848db8bb --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Fadt.aslc @@ -0,0 +1,80 @@ +/** @file +* Fixed ACPI Description Table (FADT) +* +* Copyright (c) 2020, Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include <Library/AcpiLib.h> +#include <IndustryStandard/Acpi.h> +#include <IndustryStandard/SbsaQemuAcpi.h> + +EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = { + SBSAQEMU_ACPI_HEADER ( + EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE, + EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION + ), + 0, // UINT32 FirmwareCtrl + 0, // UINT32 Dsdt + EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0 + EFI_ACPI_6_0_PM_PROFILE_ENTERPRISE_SERVER, // UINT8 PreferredPmProfile + 0, // UINT16 SciInt + 0, // UINT32 SmiCmd + 0, // UINT8 AcpiEnable + 0, // UINT8 AcpiDisable + 0, // UINT8 S4BiosReq + 0, // UINT8 PstateCnt + 0, // UINT32 Pm1aEvtBlk + 0, // UINT32 Pm1bEvtBlk + 0, // UINT32 Pm1aCntBlk + 0, // UINT32 Pm1bCntBlk + 0, // UINT32 Pm2CntBlk + 0, // UINT32 PmTmrBlk + 0, // UINT32 Gpe0Blk + 0, // UINT32 Gpe1Blk + 0, // UINT8 Pm1EvtLen + 0, // UINT8 Pm1CntLen + 0, // UINT8 Pm2CntLen + 0, // UINT8 PmTmrLen + 0, // UINT8 Gpe0BlkLen + 0, // UINT8 Gpe1BlkLen + 0, // UINT8 Gpe1Base + 0, // UINT8 CstCnt + 0, // UINT16 PLvl2Lat + 0, // UINT16 PLvl3Lat + 0, // UINT16 FlushSize + 0, // UINT16 FlushStride + 0, // UINT8 DutyOffset + 0, // UINT8 DutyWidth + 0, // UINT8 DayAlrm + 0, // UINT8 MonAlrm + 0, // UINT8 Century + 0, // UINT16 IaPcBootArch + 0, // UINT8 Reserved1 + EFI_ACPI_6_0_HW_REDUCED_ACPI | + EFI_ACPI_6_0_LOW_POWER_S0_IDLE_CAPABLE, // UINT32 Flags + NULL_GAS, // GAS ResetReg + 0, // UINT8 ResetValue + EFI_ACPI_6_0_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags + EFI_ACPI_6_0_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, + // UINT8 MinorRevision + 0, // UINT64 XFirmwareCtrl + 0, // UINT64 XDsdt + NULL_GAS, // GAS XPm1aEvtBlk + NULL_GAS, // GAS XPm1bEvtBlk + NULL_GAS, // GAS XPm1aCntBlk + NULL_GAS, // GAS XPm1bCntBlk + NULL_GAS, // GAS XPm2CntBlk + NULL_GAS, // GAS XPmTmrBlk + NULL_GAS, // GAS XGpe0Blk + NULL_GAS, // GAS XGpe1Blk + NULL_GAS, // GAS SleepControlReg + NULL_GAS, // GAS SleepStatusReg + 0 // UINT64 HypervisorVendorId +}; + +// Reference the table being generated to prevent the optimizer +// from removing the data structure from the executable +VOID* CONST ReferenceAcpiTable = &Fadt; diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc new file mode 100644 index 000000000000..52496acc449b --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc @@ -0,0 +1,67 @@ +/** @file +* Generic Timer Description Table (GTDT) +* +* Copyrignt (c) 2020, Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include <Library/AcpiLib.h> +#include <Library/PcdLib.h> +#include <IndustryStandard/Acpi.h> +#include <IndustryStandard/SbsaQemuAcpi.h> + +#define GTDT_GLOBAL_FLAGS_MAPPED EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT +#define GTDT_GLOBAL_FLAGS_NOT_MAPPED 0 +#define GTDT_GLOBAL_FLAGS_EDGE EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE +#define GTDT_GLOBAL_FLAGS_LEVEL 0 + +// Note: We could have a build flag that switches between memory mapped/non-memory mapped timer +#ifdef SYSTEM_TIMER_BASE_ADDRESS + #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL) +#else + #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_NOT_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL) + #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF +#endif + +#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE +#define GTDT_TIMER_LEVEL_TRIGGERED 0 +#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY +#define GTDT_TIMER_ACTIVE_HIGH 0 + +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) + + #pragma pack (1) + + typedef struct { + EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; + } GENERIC_TIMER_DESCRIPTION_TABLE; + + #pragma pack () + + GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = { + { + SBSAQEMU_ACPI_HEADER( + EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, + GENERIC_TIMER_DESCRIPTION_TABLE, + EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION + ), + SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress + 0, // UINT32 Reserved + FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV + GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags + FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags + FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV + GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags + FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags + 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress + 0, // UINT32 PlatformTimerCount + 0 + }, + }; + +// Reference the table being generated to prevent the optimizer from removing the +// data structure from the executable +VOID* CONST ReferenceAcpiTable = &Gtdt; diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc new file mode 100644 index 000000000000..7b8ab7b6942f --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Spcr.aslc @@ -0,0 +1,53 @@ +/** @file +* Serial Port Console Redirection Table (SPCR). +* +* Copyright (c) 2020 Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ + +#include <IndustryStandard/Acpi60.h> +#include <IndustryStandard/SbsaQemuAcpi.h> +#include <IndustryStandard/SerialPortConsoleRedirectionTable.h> + +#pragma pack(push, 1) + +STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = { + SBSAQEMU_ACPI_HEADER ( + EFI_ACPI_6_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE, + 2), /* New MS definition for PL011 support */ + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_UART, + { EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE }, + { + EFI_ACPI_6_0_SYSTEM_MEMORY, + 32, + 0, + EFI_ACPI_6_0_DWORD, + SBSAQEMU_UART0_BASE + }, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC, + 0, /* Irq */ + 33, /* GlobalSystemInterrupt */ + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1, + 0, /* Flow Control */ + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI, + EFI_ACPI_RESERVED_BYTE, /* Language */ + 0xFFFF, /* PciDeviceId */ + 0xFFFF, /* PciVendorId */ + 0x00, /* PciBusNumber */ + 0x00, /* PciDeviceNumber */ + 0x00, /* PciFunctionNumber */ + 0, /* PciFlags */ + 0, /* PciSegment */ + EFI_ACPI_RESERVED_DWORD +}; + +#pragma pack(pop) + +// Reference the table being generated to prevent the optimizer from removing +// the data structure from the executable +VOID* CONST ReferenceAcpiTable = &Spcr; diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf index 21d2135f6d17..80a4977f2ff3 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf @@ -38,4 +38,3 @@ [Pcd]

[Depex] TRUE - diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h new file mode 100644 index 000000000000..eac195b0585c --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -0,0 +1,31 @@ +/** @file +* +* Copyright (c) 2020, Linaro Limited. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#ifndef SBSAQEMUACPI_H +#define SBSAQEMUACPI_H + +// A macro to initialise the common header part of EFI ACPI tables as defined by +// EFI_ACPI_DESCRIPTION_HEADER structure. +#define SBSAQEMU_ACPI_HEADER(Signature, Type, Revision) { \ + Signature, /* UINT32 Signature */ \ + sizeof (Type), /* UINT32 Length */ \ + Revision, /* UINT8 Revision */ \ + 0, /* UINT8 Checksum */ \ + { 'L', 'I', 'N', 'A', 'R', 'O' }, /* UINT8 OemId[6] */ \ + FixedPcdGet64 (PcdAcpiDefaultOemTableId), /* UINT64 OemTableId */ \ + FixedPcdGet32 (PcdAcpiDefaultOemRevision), /* UINT32 OemRevision */ \ + FixedPcdGet32 (PcdAcpiDefaultCreatorId), /* UINT32 CreatorId */ \ + FixedPcdGet32 (PcdAcpiDefaultCreatorRevision)/* UINT32 CreatorRevision */ \ + } + +#define SBSAQEMU_UART0_BASE 0x60000000 + +#define SBSAQEMU_PCI_SEG0_CONFIG_BASE 0xf0000000 +#define SBSAQEMU_PCI_SEG0_BUSNUM_MIN 0x00 +#define SBSAQEMU_PCI_SEG0_BUSNUM_MAX 0xFF + +#endif diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec index cd879f4dbd96..71ba55a082e2 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -21,8 +21,8 @@ [Defines] # BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION # ################################################################################ -#[Includes.common] -# Include # Root include for the package +[Includes] + Include # Root include for the package

[Guids.common] gArmVirtSbsaQemuPlatformTokenSpaceGuid = { 0xaab3bea9, 0xa8e8, 0x4e76, { 0xb5, 0x3a, 0x35, 0x22, 0x11, 0xce, 0xf7, 0xf7 } }

- Add a new ACPI driver for the SbsaQemu platform which would handle any modifications needed for the ACPI tables.

- Move FdtLib from LibraryClasses.common.PEIM to LibraryClasses.common so that SbsaQemuAcpiDxe driver can use the device tree APIs

- Since the core count is controlled by Qemu, move the PcdCoreCount from PcdsFixedAtBuild to PcdsDynamic.

- Add a parser function in this driver which parses the FDT created by Qemu to determine the number of CPUs and hence update the PcdCoreCount variable.

Signed-off-by: Tanmay Jagdale tanmay.jagdale@linaro.org --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 +- Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 1 + Silicon/Qemu/SbsaQemu/Acpi.dsc.inc | 1 + .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 76 +++++++++++++++++++ .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 49 ++++++++++++ Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 + 6 files changed, 135 insertions(+), 2 deletions(-) create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c create mode 100644 Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf

diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 4739443cae93..d42b9cd4de49 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -75,6 +75,7 @@ [LibraryClasses.common] ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf

+ FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf

@@ -217,7 +218,6 @@ [LibraryClasses.common.PEIM]

PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf

- FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf ArmPlatformLib|Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.inf

[LibraryClasses.common.DXE_CORE] @@ -376,7 +376,6 @@ [PcdsFixedAtBuild.common] # gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack|TRUE

- gArmPlatformTokenSpaceGuid.PcdCoreCount|1 gArmTokenSpaceGuid.PcdVFPEnabled|1

# System Memory Base -- fixed @@ -477,6 +476,9 @@ [PcdsFixedAtBuild.common] [PcdsDynamicDefault.common] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3

+ # Core and Cluster Count + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|1 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount|1

# System Memory Size -- 128 MB initially, actual size will be fetched from DT # TODO as no DT will be used we should pass this by some other method diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf index 4526eaaa02c5..3bcf0bf0040a 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.fdf +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.fdf @@ -232,6 +232,7 @@ [FV.FvMain] # INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + INF Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf INF RuleOverride = ACPITABLE Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf

diff --git a/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc b/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc index c4a8d7a27b78..593670383750 100644 --- a/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc +++ b/Silicon/Qemu/SbsaQemu/Acpi.dsc.inc @@ -33,3 +33,4 @@ [Components.common] MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf + Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c new file mode 100644 index 000000000000..f2c15471e665 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -0,0 +1,76 @@ +/** @file +* This file is an ACPI driver for the Qemu SBSA platform. +* +* Copyright (c) 2020, Linaro Ltd. All rights reserved. +* +* SPDX-License-Identifier: BSD-2-Clause-Patent +* +**/ +#include <Library/DebugLib.h> +#include <Library/PcdLib.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiDriverEntryPoint.h> +#include <Library/UefiLib.h> +#include <Protocol/FdtClient.h> +#include <libfdt.h> + +/* + * A function that walks through the Device Tree created + * by Qemu and counts the number of CPUs present in it. + */ +STATIC +VOID +CountCpusFromFdt( + VOID +) +{ + VOID *DeviceTreeBase; + INT32 Node, Prev; + RETURN_STATUS PcdStatus; + INT32 CpuNode; + INT32 CpuCount; + + DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress); + ASSERT (DeviceTreeBase != NULL); + + // Make sure we have a valid device tree blob + ASSERT (fdt_check_header (DeviceTreeBase) == 0); + + CpuNode = fdt_path_offset (DeviceTreeBase, "/cpus"); + if (CpuNode <= 0) { + DEBUG((EFI_D_ERROR, "Unable to locate /cpus in device tree\n")); + return; + } + + CpuCount = 0; + + // Walk through /cpus node and count the number of subnodes. + // The count of these subnodes corresponds to the numer of + // CPUs created by Qemu. + Prev = fdt_first_subnode (DeviceTreeBase, CpuNode); + while (1) { + CpuCount++; + Node = fdt_next_subnode (DeviceTreeBase, Prev); + if (Node < 0) { + break; + } + Prev = Node; + } + ASSERT(CpuCount > 0); + + PcdStatus = PcdSet32S (PcdCoreCount, CpuCount); + ASSERT_RETURN_ERROR (PcdStatus); +} + +EFI_STATUS +EFIAPI +InitializeSbsaQemuAcpiDxe ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + // Parse the device tree and get the number of CPUs + CountCpusFromFdt(); + + return EFI_SUCCESS; +} diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf new file mode 100644 index 000000000000..efc4d295bfb7 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -0,0 +1,49 @@ +## @file +# This driver modifies ACPI tables for the Qemu SBSA platform +# +# Copyright (c) 2020, Linaro Ltd. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION = 0x0001001d + BASE_NAME = SbsaQemuAcpiDxe + FILE_GUID = 6c592dc9-76c8-474f-93b2-bf1e8f15ae35 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + + ENTRY_POINT = InitializeSbsaQemuAcpiDxe + +[Sources] + SbsaQemuAcpiDxe.c + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + ArmVirtPkg/ArmVirtPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Qemu/SbsaQemu/SbsaQemu.dec + +[LibraryClasses] + ArmLib + BaseMemoryLib + DebugLib + BaseLib + FdtLib + DxeServicesLib + PcdLib + UefiDriverEntryPoint + UefiLib + UefiRuntimeServicesTableLib + +[Pcd] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress + +[Depex] + TRUE diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec index 71ba55a082e2..ed87d15de003 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -35,3 +35,7 @@ [PcdsFixedAtBuild.common] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase|0|UINT64|0x00000003 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize|0x10000|UINT32|0x00000004 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000|UINT64|0x00000005 + +[PcdsDynamic.common] + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|0x1|UINT32|0x00000006 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount|0x1|UINT32|0x00000007

- Add support to create SSDT table to runtime. Since SSDT table is a data table, added a few helper macros to create the AML entries. - Also added a function to calculate the length of Packages.

Signed-off-by: Tanmay Jagdale tanmay.jagdale@linaro.org --- .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 144 ++++++++++++++++++ .../Include/IndustryStandard/SbsaQemuAcpi.h | 35 +++++ 2 files changed, 179 insertions(+)

diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index aedb306d4a13..5d16c3dfaaf3 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -9,6 +9,7 @@ #include <IndustryStandard/Acpi.h> #include <IndustryStandard/Acpi10.h> #include <IndustryStandard/Acpi60.h> +#include <IndustryStandard/AcpiAml.h> #include <IndustryStandard/SbsaQemuAcpi.h> #include <Library/AcpiLib.h> #include <Library/BaseMemoryLib.h> @@ -202,6 +203,144 @@ AddMadtTable ( return Status; }

+/* + * Function to calculate the PkgLength field in ACPI tables + */ +STATIC +UINT32 +SetPkgLength ( + IN UINT8 *TablePtr, + IN UINT32 Length +) +{ + UINT8 ByteCount; + UINT8 *PkgLeadByte = TablePtr; + + if (Length < 64) { + *TablePtr = Length; + return 1; + } + + // Set the LSB of Length in PkgLeadByte and advance Length + *PkgLeadByte = Length & 0xF; + Length = Length >> 4; + + while (Length) { + TablePtr++; + *TablePtr = (Length & 0xFF); + Length = (Length >> 8); + } + + // Calculate the number of bytes the Length field uses + // and set the ByteCount field in PkgLeadByte. + ByteCount = (TablePtr - PkgLeadByte) & 0xF; + *PkgLeadByte |= (ByteCount << 6); + + return ByteCount + 1; +} + +/* + * A function that adds the SSDT ACPI table. + */ +EFI_STATUS +AddSsdtTable ( + IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable + ) +{ + EFI_STATUS Status; + UINTN TableHandle; + UINT32 TableSize; + EFI_PHYSICAL_ADDRESS PageAddress; + UINT8 *New; + UINT32 CpuId; + UINT32 Offset; + UINT8 ScopeOpName[] = SBSAQEMU_ACPI_SCOPE_NAME; + UINT32 NumCores = PcdGet32 (PcdCoreCount); + + EFI_ACPI_DESCRIPTION_HEADER Header = + SBSAQEMU_ACPI_HEADER ( + EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_DESCRIPTION_HEADER, + EFI_ACPI_6_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION); + + SBSAQEMU_ACPI_CPU_DEVICE CpuDevice = { + { AML_EXT_OP, AML_EXT_DEVICE_OP }, /* Device () */ + SBSAQEMU_ACPI_CPU_DEV_LEN, /* Length */ + SBSAQEMU_ACPI_CPU_DEV_NAME, /* Device Name "C000" */ + SBSAQEMU_ACPI_CPU_HID, /* Name (HID, "ACPI0007") */ + SBSAQEMU_ACPI_CPU_UID, /* Name (UID, 0) */ + }; + + // Calculate the new table size based on the number of cores + TableSize = sizeof (EFI_ACPI_DESCRIPTION_HEADER) + + SBSAQEMU_ACPI_SCOPE_OP_MAX_LENGTH + sizeof (ScopeOpName) + + (sizeof (CpuDevice) * NumCores); + + Status = gBS->AllocatePages ( + AllocateAnyPages, + EfiACPIReclaimMemory, + EFI_SIZE_TO_PAGES (TableSize), + &PageAddress + ); + if (EFI_ERROR(Status)) { + DEBUG((EFI_D_ERROR, "Failed to allocate pages for SSDT table\n")); + return EFI_OUT_OF_RESOURCES; + } + + New = (UINT8 *)(UINTN) PageAddress; + ZeroMem (New, TableSize); + + // Add the ACPI Description table header + CopyMem(New, &Header, sizeof (EFI_ACPI_DESCRIPTION_HEADER)); + ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length = TableSize; + New += sizeof (EFI_ACPI_DESCRIPTION_HEADER); + + // Insert the top level ScopeOp + *New = AML_SCOPE_OP; + New++; + Offset = SetPkgLength (New, + (TableSize - sizeof (EFI_ACPI_DESCRIPTION_HEADER) - 1)); + New += Offset; + CopyMem (New, &ScopeOpName, sizeof (ScopeOpName)); + New += sizeof (ScopeOpName); + + // Add new Device structures for the Cores + for (CpuId = 0; CpuId < NumCores; CpuId++) { + SBSAQEMU_ACPI_CPU_DEVICE *CpuDevicePtr; + UINT8 CpuIdByte1, CpuIdByte2, CpuIdByte3; + + CopyMem (New, &CpuDevice, sizeof (SBSAQEMU_ACPI_CPU_DEVICE)); + CpuDevicePtr = (SBSAQEMU_ACPI_CPU_DEVICE *) New; + + CpuIdByte1 = CpuId & 0xF; + CpuIdByte2 = (CpuId >> 4) & 0xF; + CpuIdByte3 = (CpuId >> 8) & 0xF; + + CpuDevicePtr->dev_name[1] = SBSAQEMU_ACPI_ITOA(CpuIdByte3); + CpuDevicePtr->dev_name[2] = SBSAQEMU_ACPI_ITOA(CpuIdByte2); + CpuDevicePtr->dev_name[3] = SBSAQEMU_ACPI_ITOA(CpuIdByte1); + + CpuDevicePtr->uid[6] = CpuIdByte1 | CpuIdByte2; + CpuDevicePtr->uid[7] = CpuIdByte3; + New += sizeof (SBSAQEMU_ACPI_CPU_DEVICE); + } + + // Perform Checksum + AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); + + Status = AcpiTable->InstallAcpiTable ( + AcpiTable, + (EFI_ACPI_COMMON_HEADER *)PageAddress, + TableSize, + &TableHandle + ); + if (EFI_ERROR(Status)) { + DEBUG((EFI_D_ERROR, "Failed to install SSDT table\n")); + } + + return Status; +} + EFI_STATUS EFIAPI InitializeSbsaQemuAcpiDxe ( @@ -231,5 +370,10 @@ InitializeSbsaQemuAcpiDxe ( DEBUG((EFI_D_ERROR, "Failed to add MADT table\n")); }

+ Status = AddSsdtTable (AcpiTable); + if (EFI_ERROR(Status)) { + DEBUG((EFI_D_ERROR, "Failed to add SSDT table\n")); + } + return EFI_SUCCESS; } diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h index 7a9a0061675f..2227b7995763 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -43,4 +43,39 @@ #define SBSAQEMU_PCI_SEG0_BUSNUM_MIN 0x00 #define SBSAQEMU_PCI_SEG0_BUSNUM_MAX 0xFF

+#define SBSAQEMU_ACPI_SCOPE_OP_MAX_LENGTH 5 + +#define SBSAQEMU_ACPI_SCOPE_NAME { '_', 'S', 'B', '_' } + +#define SBSAQEMU_ACPI_CPU_DEV_LEN 0x1C +#define SBSAQEMU_ACPI_CPU_DEV_NAME { 'C', '0', '0', '0' } + +// Macro to convert Integer to Character +#define SBSAQEMU_ACPI_ITOA(Byte) (0x30 + (Byte > 9 ? (Byte + 1) : Byte)) + +#define SBSAQEMU_ACPI_CPU_HID { \ + AML_NAME_OP, AML_NAME_CHAR__, 'H', 'I', 'D', \ + AML_STRING_PREFIX, 'A', 'C', 'P', 'I', '0', '0', '0', '7', \ + AML_ZERO_OP \ + } + +#define SBSAQEMU_ACPI_CPU_UID { \ + AML_NAME_OP, AML_NAME_CHAR__, 'U', 'I', 'D', AML_BYTE_PREFIX, \ + AML_ZERO_OP, AML_ZERO_OP \ + } + +typedef struct { + UINT8 scope_header; + UINT8 length[2]; + UINT8 name[4]; +} SBSAQEMU_ACPI_SCOPE; + +typedef struct { + UINT8 device_header[2]; + UINT8 length; + UINT8 dev_name[4]; + UINT8 hid[15]; + UINT8 uid[8]; +} SBSAQEMU_ACPI_CPU_DEVICE; + #endif