Hi Lorenzo,
On 2020/10/22 1:26, Lorenzo Pieralisi via Linaro-open-discussions wrote:
Hi all,
according to the topics posted previously on the list, I suggest we tackle the following ones on Nov 4th (all topics posted are interesting but some require some time to elaborate following KVM forum next week):
- Hanjun/Shameer - IORT reserved memory support
- Zhangfei/Wangzhou - SVA support for SMMU stall mode
- Hanjun - Uncore DVFS and how to support it (needs spec update, either ARM specs or ACPI)
On MPAM - I don't think we require a topic for status update - technical discussions are already on ML and I don't think there is much to be done to speed up upstreaming other than following the usual process.
Please let me know your thoughts.
Is fine to me to remove the MPAM topic.
Thanks Hanjun
On Thu, Oct 22, 2020 at 01:45:32PM +0800, Hanjun Guo wrote:
Hi Lorenzo,
On 2020/10/22 1:26, Lorenzo Pieralisi via Linaro-open-discussions wrote:
Hi all,
according to the topics posted previously on the list, I suggest we tackle the following ones on Nov 4th (all topics posted are interesting but some require some time to elaborate following KVM forum next week):
- Hanjun/Shameer - IORT reserved memory support
- Zhangfei/Wangzhou - SVA support for SMMU stall mode
- Hanjun - Uncore DVFS and how to support it (needs spec update, either ARM specs or ACPI)
Hi Hanjun,
in preparation for the discussion, may I ask you please to elaborate a bit more on the Uncore DVFS topic so that we have more background info ?
That would very useful.
Thank you very much.
Lorenzo
On 2020/10/23 17:59, Lorenzo Pieralisi wrote:
On Thu, Oct 22, 2020 at 01:45:32PM +0800, Hanjun Guo wrote:
Hi Lorenzo,
On 2020/10/22 1:26, Lorenzo Pieralisi via Linaro-open-discussions wrote:
Hi all,
according to the topics posted previously on the list, I suggest we tackle the following ones on Nov 4th (all topics posted are interesting but some require some time to elaborate following KVM forum next week):
- Hanjun/Shameer - IORT reserved memory support
- Zhangfei/Wangzhou - SVA support for SMMU stall mode
- Hanjun - Uncore DVFS and how to support it (needs spec update, either ARM specs or ACPI)
Hi Hanjun,
Hi Lorenzo,
in preparation for the discussion, may I ask you please to elaborate a bit more on the Uncore DVFS topic so that we have more background info ?
Sure, for the later generation of Kunpeng server chip, there is a Uncore block in the chip which contains L3 cache, ring buses and etc., the Uncore stays in a single power domain and can do DVFS at runtime. As the Uncore consumes considerable power, so it's better to control the frequency at runtime.
The Uncore can be abstracted as a power device, and the power can be controlled via a single interface such as MMIO, but the permission is only restricted in EL3 (avoid spectre via DVFS), so I think we need a spec update to control the power for Uncore devices, like PSCI or SCMI, or an common interface for ACPI spec.
Please let me know if I didn't explain it in detail, I can prepare a slide for the meeting if needed.
Thanks Hanjun
On Mon, Oct 26, 2020 at 08:37:00PM +0800, Hanjun Guo wrote:
[...]
in preparation for the discussion, may I ask you please to elaborate a bit more on the Uncore DVFS topic so that we have more background info ?
Sure, for the later generation of Kunpeng server chip, there is a Uncore block in the chip which contains L3 cache, ring buses and etc., the Uncore stays in a single power domain and can do DVFS at runtime. As the Uncore consumes considerable power, so it's better to control the frequency at runtime.
The Uncore can be abstracted as a power device, and the power can be controlled via a single interface such as MMIO, but the permission is only restricted in EL3 (avoid spectre via DVFS), so I think we need a spec update to control the power for Uncore devices, like PSCI or SCMI, or an common interface for ACPI spec.
Please let me know if I didn't explain it in detail, I can prepare a slide for the meeting if needed.
You did explain it properly and yes I would encourage all people who raised a topic to prepare a slide or two to start the technical session.
Please everyone note that these sessions are there to discuss ongoing work technical details and how to make progress on those, not patches upstreaming plans.
Thank you very much.
Lorenzo
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Lorenzo Pieralisi