ok,according to everybody’s feedback,maybe we can communicate through email for the IORT RMR/SPDM topics first,and have the meeting on July 26th,is that ok?
Thanks:) Joyce
在 2022年6月24日,下午10:38,Jonathan Cameron jonathan.cameron@huawei.com 写道:
My availability that week is going to be hard to predict (at a workshop in Germany) but SPDM topic can wait. I just wanted to confirm general interest and email works fine for that.
Good for others to have a sync meeting and if I can dial in for a bit I will do so.
Jonathan
-----Original Message----- From: Lorenzo Pieralisi Lorenzo.Pieralisi@arm.com Sent: 24 June 2022 15:30 To: Joyce Qi joyce.qi@linaro.org Cc: Shameerali Kolothum Thodi shameerali.kolothum.thodi@huawei.com; Jonathan Cameron jonathan.cameron@huawei.com; Lorenzo Pieralisi lpieralisi@kernel.org; Jonathon Burcham jon.burcham@linaro.org; yangyicong yangyicong@huawei.com; Hesham Almatary hesham.almatary@huawei.com; shenyang (M) shenyang39@huawei.com; tangchengchang tangchengchang@huawei.com; Dietmar Eggemann Dietmar.Eggemann@arm.com; linaro-open-discussions@op-lists.linaro.org; lorenzo.pieralisi@gmail.com Subject: Re: [Linaro-open-discussions] 回复:Re: 回复:Li =?utf-8?Q?naro-open-discussions_call_on_May___24th
Hi,
Moving to July 5th is fine by me.
For IORT RMR I'd encourage Shameer to ping the mailing list for SMMU ACKs and not wait till July 5th, I believe I acked the relevant patches.
I CC'ed my personal email since the email address I am sending from will stop working tonight.
Thanks, Lorenzo
From: Joyce Qi joyce.qi@linaro.org Sent: 24 June 2022 15:25 To: Lorenzo Pieralisi Cc: Shameerali Kolothum Thodi; Jonathan Cameron; Lorenzo Pieralisi; Jonathon Burcham; yangyicong; Hesham Almatary; shenyang (M); tangchengchang; Dietmar Eggemann; linaro-open-discussions@op-lists.linaro.org Subject: Re: [Linaro-open-discussions] 回复:Re: 回复:Li =?utf-8?Q?naro-open-discussions_call_on_May___24th
Hi Lorenzo,Jonathan,Shameerali,
Thanks for all your feedback,So can we move the LOD to July 5th for the SPDM discussions? If that’s ok,I can reschedule the LDO meeting.
Thanks:) Joyce
在 2022年6月24日,下午8:51,Lorenzo Pieralisi Lorenzo.Pieralisi@arm.com 写道:
Hi,
I am traveling, I am interested on the SPDM discussions, I did not think there is much left to do wrt IORT RMR (other than merging it and decide who does that) but we can talk on thursday, just use lorenzo.pieralisi@gmail.com please to send the invite.
If we can talk week starting July 4th honestly it would even be better.
Thanks, Lorenzo
From: joyce.qi--- via Linaro-open-discussions linaro-open-discussions@op-lists.linaro.org Sent: 24 June 2022 11:33 To: Shameerali Kolothum Thodi; Jonathan Cameron; Lorenzo Pieralisi Cc: Jonathon Burcham; yangyicong; Hesham Almatary; shenyang (M); tangchengchang; Dietmar Eggemann; linaro-open-discussions@op-lists.linaro.org Subject: [Linaro-open-discussions] 回复:Re: 回复:Li =?utf-8?Q?naro-open-discussions_call_on_May___24th
Hi Jonanthan,Shameerali, Thanks a lot for your input here:) @Lorenzo, Are you available on next Thuesday’s LOD meeting for checking the status on IORT RMR series Shameerali has brought up? Thanks:) Joyce
-------- 原始邮件 -------- 发件人: Shameerali Kolothum Thodi shameerali.kolothum.thodi@huawei.com 日期: 2022年6月24日周五 傍晚5:24 收件人: Jonathan Cameron jonathan.cameron@huawei.com, joyce.qi@linaro.org, Lorenzo Pieralisi lpieralisi@kernel.org 抄送: Jonathon Burcham jon.burcham@linaro.org, yangyicong yangyicong@huawei.com, Hesham Almatary hesham.almatary@huawei.com, "shenyang (M)" shenyang39@huawei.com, tangchengchang tangchengchang@huawei.com, Dietmar Eggemann dietmar.eggemann@arm.com, linaro-open-discussions@op-lists.linaro.org 主 题: RE: [Linaro-open-discussions] Re: 回复:Li =?utf-8?Q?naro-open-discussions_call_on_May___24th
-----Original Message----- From: Jonathan Cameron via Linaro-open-discussions [mailto:linaro-open-discussions@op-lists.linaro.org] Sent: 24 June 2022 10:13 To: joyce.qi@linaro.org Cc: Jonathan Cameron via Linaro-open-discussions linaro-open-discussions@op-lists.linaro.org; Jonathon Burcham jon.burcham@linaro.org; yangyicong yangyicong@huawei.com; Hesham Almatary hesham.almatary@huawei.com; shenyang (M) shenyang39@huawei.com; tangchengchang tangchengchang@huawei.com; Dietmar Eggemann dietmar.eggemann@arm.com Subject: [Linaro-open-discussions] Re: 回复:Linaro-open-discussions
call on
May 24th
Hi Joyce,
Thanks for the reminder. I don’t think it is worth discussing at
LOD as not
the right people on the call, but I would like to draw attention to a
thread
discussing whether to propose a SPDM BoF at Linux Plumbers: https://lore.kernel.org/linux-cxl/20220609124702.000037b0@Huawei.com/
At the moment I plan to speculatively put in a proposal, but may
withdraw it
if not enough people would be involved to make useful progress. The big ‘discussion’ point is how much to do in kernel vs in
Userspace.
I’ve just polled some of my colleagues for any other topics they
would like to
raise on LOD, but for now I don’t have anything ready to talk about.
If Lorenzo is around, would like to check the status on IORT RMR series. I have sent out the v13 here, https://lore.kernel.org/linux-acpi/20220615101044.1972-8-shameerali.kol othum.thodi@huawei.com/T/ Thanks, Shameer
Thanks,
Jonathan
From: joyce.qi@linaro.org joyce.qi@linaro.org Sent: 24 June 2022 10:06 To: Jonathan Cameron jonathan.cameron@huawei.com Cc: Jonathan Cameron via Linaro-open-discussions linaro-open-discussions@op-lists.linaro.org; Lorenzo Pieralisi lorenzo.pieralisi@arm.com; Jonathon Burcham
yangyicong yangyicong@huawei.com; Hesham Almatary hesham.almatary@huawei.com; shenyang (M) shenyang39@huawei.com; tangchengchang tangchengchang@huawei.com; Dietmar Eggemann dietmar.eggemann@arm.com Subject: 回复:[Linaro-open-discussions] Linaro-open-discussions call on May 24th
Hi Jonanthan,all
Do you have anything to sync during next week's LOD meeting?
Thanks Joyce
-------- 原始邮件 -------- 发件人: Joyce Qi <joyce.qi@linaro.orgmailto:joyce.qi@linaro.org> 日期: 2022年5月24日周二 早上7:08 收件人: Jonathan Cameron <jonathan.cameron@huawei.commailto:jonathan.cameron@huawei.com> 抄送: Jonathan Cameron via Linaro-open-discussions
<linaro-open-discussions@op-lists.linaro.org<mailto:linaro-open-discuss ions
@op-lists.linaro.org>>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.commailto:lorenzo.pieralisi@arm.com>,
Jonathon
Burcham <jon.burcham@linaro.orgmailto:jon.burcham@linaro.org>, yangyicong <yangyicong@huawei.commailto:yangyicong@huawei.com>, Hesham Almatary <hesham.almatary@huawei.commailto:hesham.almatary@huawei.com>, "shenyang (M)" <shenyang39@huawei.commailto:shenyang39@huawei.com>, tangchengchang <tangchengchang@huawei.commailto:tangchengchang@huawei.com>, Dietmar Eggemann <dietmar.eggemann@arm.commailto:dietmar.eggemann@arm.com> 主 题: Re: [Linaro-open-discussions] Linaro-open-discussions call on
May
24th Hi Jonathan,all
Thanks for the confirm. I will cancel today’s meeting since no topic:)
Thanks:) Joyce
在 2022年5月20日,下午7:10,Jonathan Cameron <jonathan.cameron@huawei.commailto:jonathan.cameron@huawei.com> 写道:
Hi Joyce,
Nothing to discuss from me. Anyone else have anything they want to
bring
up?
Thanks,
Jonathan
From: Joyce Qi <joyce.qi@linaro.orgmailto:joyce.qi@linaro.org> Sent: 18 May 2022 10:37 To: Jonathan Cameron <jonathan.cameron@huawei.commailto:jonathan.cameron@huawei.com> Cc: Jonathan Cameron via Linaro-open-discussions
<linaro-open-discussions@op-lists.linaro.org<mailto:linaro-open-discuss ions
@op-lists.linaro.org>>; Lorenzo Pieralisi <lorenzo.pieralisi@arm.commailto:lorenzo.pieralisi@arm.com>;
Jonathon
Burcham <jon.burcham@linaro.orgmailto:jon.burcham@linaro.org>; yangyicong <yangyicong@huawei.commailto:yangyicong@huawei.com>; Hesham Almatary <hesham.almatary@huawei.commailto:hesham.almatary@huawei.com>; shenyang (M) <shenyang39@huawei.commailto:shenyang39@huawei.com>; tangchengchang <tangchengchang@huawei.commailto:tangchengchang@huawei.com>; Dietmar Eggemann <dietmar.eggemann@arm.commailto:dietmar.eggemann@arm.com> Subject: Re: [Linaro-open-discussions] Linaro-open-discussions call
on May
24th
Hi Jonathan, Lorenz ,all,
Do you have any topic to discuss during the Linaro open discussions
next
Tuesday?
Thanks:) Joyce
在 2022年4月26日,上午1:45,Jonathan Cameron <Jonathan.Cameron@huawei.commailto:Jonathan.Cameron@huawei.com> 写道:
On Fri, 22 Apr 2022 14:00:06 +0100 Jonathan Cameron via Linaro-open-discussions
<linaro-open-discussions@op-lists.linaro.org<mailto:linaro-open-discuss ions
@op-lists.linaro.org>> wrote:
On Fri, 22 Apr 2022 11:33:29 +0100 Lorenzo Pieralisi <lorenzo.pieralisi@arm.commailto:lorenzo.pieralisi@arm.com> wrote:
On Fri, Apr 22, 2022 at 10:36:43AM +0100, Jonathan Cameron wrote: On Thu, 21 Apr 2022 21:32:01 +0800 Joyce Qi via Linaro-open-discussions
<linaro-open-discussions@op-lists.linaro.org<mailto:linaro-open-discuss ions
@op-lists.linaro.org>> wrote:
Hi Jonathon锟斤拷Lorenzo锟斤拷
Do we have some topic to discuss for the Linaro-open-disscussions
next
week?
Thanks:) Joyce
Hi Joyce,
Thanks for the reminder. So topics:
RMR: Nothing from our side
vCPUHP: we have a 'working' QEMU tree though it has some known problems (doesn't work with SVE for some reason - so some debugging
to
do). Should be able to upload that shortly for anyone else who wants to play with it. Any updates on progress of kernel patches from ARM side would be good but email is fine for that.
Could not work on them, I need to figure out a plan and quickly, we can talk about that though, I should be able to have a clearer picture by Tuesday.
I am still using your SPDM stack and there are a couple of things I don't get (eg CHALLENGE_AUTH signature verification, RSA path, spdm_asym_rsassa_3072 path in spdm_verify_signature() - just wanted to ask if you tested this path, I am struggling with signature verification - just wanted to ask in particular about the need for ASN.1 encoding to use verify_signature()).
Tested this again and it seems to be working (tm)
Here are the logs... Just in case you fancy hand decoding the
exchange.
Sig should be the very last bit of the last message (ignoring the 00
pad IIRC)
Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00 0c Platform Port Transmit Buffer: 01 00 01 00 03 00 00 00 10 84 00 00 Platform Port Receive Command: 00 00 00 01 Platform Port Receive TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 14 Platform Port Receive Buffer: 01 00 01 00 05 00 00 00 10 04 00 00 00
03 00
10 00 11 00 12 Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00 0c Platform Port Transmit Buffer: 01 00 01 00 03 00 00 00 10 84 00 00 Platform Port Receive Command: 00 00 00 01 Platform Port Receive TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 14 Platform Port Receive Buffer: 01 00 01 00 05 00 00 00 10 04 00 00 00
03 00
10 00 11 00 12 Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00 14 Platform Port Transmit Buffer: 01 00 01 00 05 00 00 00 11 e1 00 00
00 02
00 00 c6 f7 00 00 Platform Port Receive Command: 00 00 00 01 Platform Port Receive TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 14 Platform Port Receive Buffer: 01 00 01 00 05 00 00 00 11 61 00 00 00
00 00
00 f7 fb 00 00 Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00 38 Platform Port Transmit Buffer: 01 00 01 00 0e 00 00 00 11 e3 04 00
30 00
01 00 94 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00
00 00 02 20 1b 00 03 20 06 00 04 20 94 00 05 20 01 00 Platform Port Receive Command: 00 00 00 01 Platform Port Receive TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 3c Platform Port Receive Buffer: 01 00 01 00 0f 00 00 00 11 63 04 00 34
00
01 00 08 00 00 00 04 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00
00
00 00 00 00 00 00 02 20 10 00 03 20 02 00 04 20 04 00 05 20 01 00 Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00 0c Platform Port Transmit Buffer: 01 00 01 00 03 00 00 00 11 81 00 00 Platform Port Receive Command: 00 00 00 01 Platform Port Receive TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 9c Platform Port Receive Buffer: 01 00 01 00 27 00 00 00 11 01 00 07 6b
3e 6a
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30 ed
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03 b9
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00 00
80 Platform Port Receive Command: 00 00 00 01 Platform Port Receive TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 04 10 Platform Port Receive Buffer: 01 00 01 00 04 01 00 00 11 02 00 00 00
04 64
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71 10
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d4
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13 01 01
ff 04 05 30 03 01 01 ff 30 0d 06 09 2a 86 48 86 f7 0d 01 01 0c 05 00
03 82
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9b 19
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cd f1
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fd 95 49
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57 a6 39
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61 f5
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55 d0
a2 6f 8a db a1 54 7a ac 9f d3 e8 c5 1f 55 2c 2e fc 37 c9 4c a1 22 a4
e4 20 77
Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00 10 Platform Port Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00 00 00
04 64
0a Platform Port Receive Command: 00 00 00 01 Platform Port Receive TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 04 10 Platform Port Receive Buffer: 01 00 01 00 04 01 00 00 11 02 00 00 00
04 64
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37 b5
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0b a4
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4a 0f
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01
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30 18
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41
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32
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74
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65
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00
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31 0c
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23 b3
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70 de
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b0 0e
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38 80
ab a8 be f3 d1 5d 5f 6e cd c7 4b af 85 2f a5 e1 5e 74 0c c8 be a2 67
98 c7
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69 90
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f6 69
7c d7 07 d4 51 72 94 f5 44 02 7c cb bf 2e f0 1c d7 5b ac ab a7 ac 35
b7 f4
19 cc 78 86 b6 ac 38 17 b3 37 09 5d b5 3f 65 e1 a8 7e 7b 42 0d cb 24
e9 3d
fc d8 06 2e bc b3 1b 1c 2f 26 cf d2 24 f4 f7 7b 22 fd f1 6a 4e a9 73
0a ea c5
11 b9 d3 07 57 f6 b7 d4 df 66 2a 84 7b ec 0b 77 93 69 d6 06 e1 96 97
4c 7e
72 51 be a4 d1 d6 41 33 d8 69 41 f8 3f 57 44 48 82 ad 34 26 e1 2f f6
d4 fd
dd 6f a7 e1 55 69 5c 64 a6 a2 a1 70 aa 6f dd a0 cb 3c 9f ce 87 13 02
03 01
00 01 a3 5e 30 5c 30 0c 06 03 55 1d 13 04 05 30 03 01 01 ff 30 0b 06
03 55
1d 0f 04 04 03 02 01 fe 30 1d 06 03 55 1d 0e 04 16 04 14 c1 3f 34 2e
d9 40
de 6a 8d b4 45 ed 8a a0 6b b6 73 03 2b e5 30 20 06 03 55 1d 25 01 01
ff 04
16 30 14 06 08 2b 06 01 05 05 07 03 01 06 08 2b 06 01 05 05 07 03 02
30
0d 06 09 2a 86 48 86 f7 0d 01 01 0c 05 00 03 82 02 01 00 7d 96 9d 42
20 f4
5c 80 19 d9 31 Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00 10 Platform Port Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00 00 00
08 64
06 Platform Port Receive Command: 00 00 00 01 Platform Port Receive TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 04 10 Platform Port Receive Buffer: 01 00 01 00 04 01 00 00 11 02 00 00 00
04 64
02 d9 f4 22 2b c9 ea 52 0f 3e a8 e1 fb 87 b9 28 8a c6 70 32 5f a5 4e
a9 a2
22 ed 38 36 69 38 20 07 81 f2 b0 80 b6 05 5f b3 26 8b 60 08 ac fa db
78 08
20 c7 c5 3c 70 85 b8 e3 3c 81 45 3e 2b d9 6f e9 bf bf b9 d7 59 bd 80
46 87
08 f8 72 1e 44 b6 c4 17 2e 0e fe 51 28 d3 a5 d4 18 7e b6 64 ba 45 4f
bc 51
dd 38 70 e7 1f 0f 07 4d 75 b5 3e 2c 95 ca 11 0b a7 12 0f 25 8d ed 0a
4b 6f
96 e2 14 22 2d f7 96 64 6a c9 3a eb 09 71 89 ae 8d 82 2e 31 d6 46 58
6c 85
3b dc 14 1f c3 5c b3 02 fe ef 26 f1 8a d3 70 50 88 45 bd c8 f7 57 24
1b ef 01
8b 84 42 30 bb 1b 51 f4 e5 c2 02 6f ae 42 1d 4c a8 08 b2 75 c8 9b 6c
6f 75
e9 97 4a b3 f3 17 54 90 3b 1d c1 c7 e7 08 8a 88 5f 42 67 b5 04 4d 4f
b8 b9
5f 60 69 3a 1b 6a ee 39 3d 72 09 c4 80 5e 89 15 12 87 39 68 63 7c 65
ed b4
f1 12 d9 b9 82 30 74 0b aa 40 14 e0 33 f7 98 af 31 db e8 81 62 92 e6
fc 9b
6b 88 f9 cc c1 e4 6f 95 d2 86 f2 34 8f 48 c7 37 45 8e 25 07 26 f7 18
75 04
12 e6 16 6f 50 09 26 c9 8e 36 3e 41 6d 90 d0 31 13 e9 47 3c c9 c4 f3
c1 b0
1c 20 1c c8 95 4d 18 8d 46 83 35 fa 95 03 36 88 68 55 df a3 8d 79 9b
eb 16
bf 88 38 10 db 8c c2 f1 20 1b 36 a7 3b 44 26 bd c1 29 7f 02 98 a7 31
aa cd
60 c7 ee 15 a4 b2 be 66 07 47 ea 89 95 5f 32 c6 bf 2e b5 66 46 5a e1
79 f2
cd 4a 39 e0 9d f1 74 2f 00 6b e4 60 20 88 f0 53 83 26 6d ee ac a6 f6
54 47
e2 7a 58 a6 29 1d c7 50 a9 91 0c 68 ff fd 7b 25 a2 f3 34 b2 15 bd f4
7d cf 9e
f1 4c 0d 86 39 b2 3e 80 e9 94 15 55 c8 af 8c d2 a9 6e 61 ce e5 23 22
dc 4e
b8 1c 41 68 7a b2 30 23 1c f2 6e 22 2e bd cc 6a 99 0b 1b eb 58 05 1c
04 c3
30 82 04 6b 30 82 02 d3 a0 03 02 01 02 02 01 03 30 0d 06 09 2a 86 48
86
f7 0d 01 01 0c 05 00 30 2b 31 29 30 27 06 03 55 04 03 0c 20 69 6e 74
65 6c
20 74 65 73 74 20 52 53 41 20 69 6e 74 65 72 6d 65 64 69 61 74 65 20
63
65 72 74 30 1e 17 0d 32 32 30 33 30 33 31 31 34 30 32 34 5a 17 0d 33
32
30 32 32 39 31 31 34 30 32 34 5a 30 28 31 26 30 24 06 03 55 04 03 0c
1d
69 6e 74 65 6c 20 74 65 73 74 20 52 53 41 20 72 65 73 70 6f 6e 64 65
72 20
63 65 72 74 30 82 01 a2 30 0d 06 09 2a 86 48 86 f7 0d 01 01 01 05 00
03
82 01 8f 00 30 82 01 8a 02 82 01 81 00 a3 d7 6e f3 b7 4f 50 46 6c 67
7f 61
1a 30 85 a7 5a 8d b9 1f 29 76 86 57 5c cd 5c 20 fe b3 74 59 20 69 5e
8f de
22 cb a8 e9 f0 fb 3a 1a 45 be ef 50 46 b3 fc fe 74 ea e5 9d 0e 8d 3e
b8 13 a5
d2 7b 67 49 f6 6b 2d 7c 97 64 d1 24 ae c4 25 3f bf 67 9a 27 5d 72 df
23 87
d9 53 ba 8d de a7 3d cd e4 1c 9f 66 50 f4 e0 b7 96 97 36 2b 1a f6 38
d8 7e
0e c4 70 bc 7c 00 4a 74 89 9b 62 a5 82 d9 6a 69 b7 23 aa 74 9e ef 7c
b9 59
12 4c 8f 4e a2 42 5c d1 32 54 39 ea ca 64 e0 33 50 6c df f5 12 8e 1c
3d 51
fe da b8 57 6e 7b 42 2d b6 ec 21 92 af 08 f2 89 c8 19 a4 d5 32 56 62
c2 a3
f5 cc ec d4 eb 07 74 28 a5 5c 0b 1c 7a 4e 03 3a d5 c8 4e 39 25 4a 9b
ce 9a
63 1a 15 2c 98 4b 64 04 2c 9b 7d 92 32 36 33 60 8b ec 2c a8 5d 95 74
06 3f
83 cb 62 12 84 b8 dd 68 eb 1c 18 6b 84 cc b6 ef 4f a8 3b e1 0f 0a 09
46 c6
0f fe 24 55 8c 85 a1 3d 37 b1 ff 29 55 5b 23 f1 91 df cc 9d 38 48 72
0a 55
b7 45 42 25 c3 05 67 b4 bc 17 cd fd a3 7b 1c e4 d8 b1 8b 42 b2 47 1b
b7 99
4d 8a fd fe 52 80 94 58 e0 81 37 9a 91 61 93 e4 49 5e 69 16 32 4c 03
7c 42
2e d1 Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00 10 Platform Port Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00 00 00
0c 64
02 Platform Port Receive Command: 00 00 00 01 Platform Port Receive TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 02 74 Platform Port Receive Buffer: 01 00 01 00 9d 00 00 00 11 02 00 00 64
02 00
00 74 4f e8 47 58 28 7f 27 57 6b 66 80 29 5e cb b2 b2 a3 61 29 77 55
2f 44
6e 47 c8 c5 93 ec 90 96 55 fc 6b 27 03 2a 9e ef 28 b5 49 05 02 03 01
00 01
a3 81 9c 30 81 99 30 0c 06 03 55 1d 13 01 01 ff 04 02 30 00 30 0b 06
03 55
1d 0f 04 04 03 02 05 e0 30 1d 06 03 55 1d 0e 04 16 04 14 86 f9 ed fa
46 3d
7b 2b 5c 16 29 72 c6 b2 4b af b9 b2 8b df 30 31 06 03 55 1d 11 04 2a
30 28
a0 26 06 0a 2b 06 01 04 01 83 1c 82 12 01 a0 18 0c 16 41 43 4d 45 3a
57
49 44 47 45 54 3a 31 32 33 34 35 36 37 38 39 30 30 2a 06 03 55 1d 25
01
01 ff 04 20 30 1e 06 08 2b 06 01 05 05 07 03 01 06 08 2b 06 01 05 05
07 03
02 06 08 2b 06 01 05 05 07 03 09 30 0d 06 09 2a 86 48 86 f7 0d 01 01
0c
05 00 03 82 01 81 00 81 69 45 3a 56 b5 12 ee 27 57 12 e1 bd 60 b6 ca
c6 a4
d1 67 8c 8a e4 7c 9f e2 6f 9d b0 6e 6e e1 5d d8 b6 53 ac fb 68 d3 ee
55 fc
04 69 ba 33 8d a0 9b cd 2c 6e a4 fd 04 0e ac 5c d4 2f ce d1 89 d9 7e
a1 e1
b4 0c 7c 79 bd 2c 51 50 2a 01 7d 06 82 87 f0 1c f3 72 3b 14 6c 45 e0
6b 25
88 27 8e cb ec 21 98 c0 09 da 78 cc e7 39 10 0d d4 1a c2 0c 6d 31 2e
3a 5f
34 f9 ea 5c 10 c1 90 3a a1 ff 46 7d 16 77 a6 7c b7 f5 ce bf 57 6a 73
e0 bf f7
22 ba 57 d4 a0 b5 67 8c 1e 8c 9c 9b e6 ee 9a 0b 75 69 26 ce 78 de 24
21 85
99 22 95 c5 fd a3 8a 1d c8 96 80 6a 26 aa c3 59 d9 de a7 31 03 59 78
58 db
c3 7d 0e 3f 97 50 b4 0f 53 41 0d 4b dd 66 8d bb 57 b6 f7 f7 fb 43 9e
25 3c
bc fa 20 84 bc 5d f8 71 3b af 6a e1 b1 84 41 d5 17 00 1d 9d 83 59 b2
ce bd
40 5a ba c6 52 45 2c 49 ff 10 d4 a1 e9 19 11 b5 3a 87 cc 74 76 f6 4d
07 92
f1 98 53 07 96 89 9e 6c 70 cf 2e 2c 7d f1 dd d3 26 0a a8 39 23 1f 5c
60 e7
32 13 61 04 94 f9 ff 21 2a 00 9c c8 e7 e7 53 ef e0 73 25 be f0 7d f9
bd 49
08 dd c0 1b 68 67 87 a2 8f 8b ed 95 12 dd 01 fc ac 10 b7 d3 60 dc 03
2e 8d
ee 9b 85 1c 56 d5 a8 1d bb 0b 75 91 d7 b9 5d b5 f8 57 4f c5 4e 02 34
76 a4
cd b9 42 c4 58 de 57 dc 75 31 e3 6c 2e 65 d0 Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00 2c
//This is the challenge auth. Platform Port Transmit Buffer: 01 00 01 00 0b 00 00 00 11 83 00 00 af
2c d9
aa cb 59 67 ce 3f 7b 8f a5 26 00 4e 1f 1c 4e c3 1e 31 06 be 0d 9e 4f
f8 b1 7c
2a 39 89 Platform Port Receive Command: 00 00 00 01 Platform Port Receive TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 01 e0 Platform Port Receive Buffer: 01 00 01 00 78 00 00 00 11 03 80 01 6b
3e 6a
85 12 30 ed ec 1e 27 0e 6e 96 b0 95 68 eb b0 1f 9a 7a 63 f6 bd 04 0d
04 cc
45 0a 03 b9 aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59 61 17 8f
cf a6
2d 0d e2 aa 90 91 06 7c 8e 3b 8b a7 64 7c 72 09 b2 9c 89 5b f1 30 47
e7 5b
07 58 00 00 9c 43 d9 7b a3 ae c7 d4 bd 5e a8 db 74 b3 81 97 10 6e 2f
22 5a
26 c0 09 02 43 1d c1 3b dd cf e8 13 33 ff dc 02 39 15 2b 98 16 b5 eb
8e 63
32 5a 3e 2a 6a 00 96 8e 42 5d 11 46 a6 7e d5 a8 76 11 94 2c a8 2c c7
6d 48
94 80 a0 fd 9a 7e 4a 84 59 c0 25 17 7d 0f d5 0d 93 75 02 1e 61 ef 5e
5d 06
80 64 4d 6a 47 91 c7 b1 ca e3 d5 ab b3 6c 97 8a f0 56 39 e6 3d a0 ad
96 20
14 43 fc 83 5d 21 08 78 e8 85 69 a0 d2 e6 9a c9 a9 f6 96 66 ee 80 a6
06 a6
a6 ee cb 9b 7c e4 65 5f a5 0c 5a d9 5e de 50 d1 ab 73 8b c4 f7 3a f2
62 59
27 16 fa 42 1b e1 db 19 76 a8 40 06 25 d3 28 54 bf dd d4 75 1e 4f 40
d0 c4
3e 1e 60 e7 4b 9b c9 c8 98 db a4 74 8f 86 39 ae 76 9c f9 c9 fe 63 ef
34 ab
4d 0b 14 22 d0 d6 9e a3 fd 12 ab c3 7c 61 fd ea 09 dc 2d ad 78 6e ce
13 2b
95 36 83 34 3a 1b ef d3 fd 07 de b2 df c7 7a 83 bd 6e ab 51 70 99 4e
28 07
de 63 42 ab 81 96 79 7f 30 27 28 4a 3e a1 8f 42 5f 7d cd 8f ec 86 e0
ea 2b
fb 05 c2 ce ce 69 ae 4e 5c dd 95 85 11 23 a3 80 85 40 65 e3 a1 92 18
9a dc
31 ac 13 24 a3 a9 b9 5c 95 f5 b5 b5 08 ee 7d d8 ff 44 42 77 c4 09 25
35 7c
b4 0b 64 77 ea 74 19 b7 b0 c1 04 6d 42 7e ab 32 91 e5 b1 59 2d 60 31
11 5f
38 52 36 d0 ba c0 73 d5 fb 5c b6 82 a1 00 00
from spdm_emu last message is better formatted.
SpdmReceiveRequest[0] (0x24): 0000: 11 83 00 00 af 2c d9 aa cb 59 67 ce 3f 7b 8f a5 26 00 4e 1f 1c
4e c3
1e 31 06 be 0d 9e 4f f8 b1 0020: 7c 2a 39 89 SpdmSendResponse[0] ... m1m2 hash - 6b c2 91 d6 c1 fe 1c 5e c9 bf 04 f6 fd 0f b1 58 9d 56 d3
af 69
08 3b eb 06 ba 6d b0 d2 e2 33 46 8a d8 ff 4d 9a 44 13 d2 04 57 e9 b9
ce b7
b2 05 SpdmSendResponse[0] (0x1d6): 0000: 11 03 80 01 6b 3e 6a 85 12 30 ed ec 1e 27 0e 6e 96 b0 95 68 eb
b0 1f
9a 7a 63 f6 bd 04 0d 04 cc 0020: 45 0a 03 b9 aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59 61
17 8f
cf a6 2d 0d e2 aa 90 91 06 0040: 7c 8e 3b 8b a7 64 7c 72 09 b2 9c 89 5b f1 30 47 e7 5b 07 58 00
00 9c
43 d9 7b a3 ae c7 d4 bd 5e 0060: a8 db 74 b3 81 97 10 6e 2f 22 5a 26 c0 09 02 43 1d c1 3b dd cf
e8 13
33 ff dc 02 39 15 2b 98 16 0080: b5 eb 8e 63 32 5a 3e 2a 6a 00 96 8e 42 5d 11 46 a6 7e d5 a8 76
11 94
2c a8 2c c7 6d 48 94 80 a0 00a0: fd 9a 7e 4a 84 59 c0 25 17 7d 0f d5 0d 93 75 02 1e 61 ef 5e 5d
06 80
64 4d 6a 47 91 c7 b1 ca e3 00c0: d5 ab b3 6c 97 8a f0 56 39 e6 3d a0 ad 96 20 14 43 fc 83 5d 21
08 78
e8 85 69 a0 d2 e6 9a c9 a9 00e0: f6 96 66 ee 80 a6 06 a6 a6 ee cb 9b 7c e4 65 5f a5 0c 5a d9 5e
de 50
d1 ab 73 8b c4 f7 3a f2 62 0100: 59 27 16 fa 42 1b e1 db 19 76 a8 40 06 25 d3 28 54 bf dd d4 75
1e 4f
40 d0 c4 3e 1e 60 e7 4b 9b 0120: c9 c8 98 db a4 74 8f 86 39 ae 76 9c f9 c9 fe 63 ef 34 ab 4d 0b
14 22
d0 d6 9e a3 fd 12 ab c3 7c 0140: 61 fd ea 09 dc 2d ad 78 6e ce 13 2b 95 36 83 34 3a 1b ef d3 fd
07 de
b2 df c7 7a 83 bd 6e ab 51 0160: 70 99 4e 28 07 de 63 42 ab 81 96 79 7f 30 27 28 4a 3e a1 8f 42
5f 7d
cd 8f ec 86 e0 ea 2b fb 05 0180: c2 ce ce 69 ae 4e 5c dd 95 85 11 23 a3 80 85 40 65 e3 a1 92 18
9a dc
31 ac 13 24 a3 a9 b9 5c 95 01a0: f5 b5 b5 08 ee 7d d8 ff 44 42 77 c4 09 25 35 7c b4 0b 64 77 ea
74 19
b7 b0 c1 04 6d 42 7e ab 32 01c0: 91 e5 b1 59 2d 60 31 11 5f 38 52 36 d0 ba c0 73 d5 fb 5c b6 82
a1
I vaguely recall the running hash need for a challenge auth being
rather hard
to get right but I had the advantage of being able to compare how both sides built it up.
Jonathan
Ah. Been a while, but IIRC correctly the spec doesn't make it clear when signatures should be ASN.1. My basis for choosing combinations in that code were what libSPDM did at the time. I
remember
a bunch of trial and error and also hand decoding binary to try to figure out what the encodings were. I also enjoyed those places where various different ASN.1 encoded structures were concatenated rather that encoded in one go - hence no cheap way to index to the next one.
I'm reviewing a nice short 972 page spec draft this week (which will
remain
unnamed :) but if I get time I'll see if I can test that path before Tuesday.
I think I ran basic tests on all the protocol types, but it was a
long
time ago so possible I missed one.
I meant to seek a spec clarification but haven't gotten around to it
yet.
Request from DMTF people was to file tickets against he spec for
stuff
like that.
Jonathan
Thanks, Lorenzo
New Potential topic.
Scheduler Tuneables from NUMA topology.
This is yangyicong's topic but I'll attempt to summarize:
https://lore.kernel.org/lkml/ef3b3e55-8be9-595f-6d54-886d13a7e2fd@hisi l
icon.com/
The scheduler contains a bunch of tunables including this one which
is
"migration cost" This value is used to make decisions in load balancing + to control
the
frequency of load balancing to avoid doing it too often. The default value has been fixed for a
long time
and systems have changed a lot in that time.
Currently the value is tunable via debugfs, but in the above thread
the
proposal to somehow base the value on the system topology was made.
We haven't yet proceeded very far with this but if we can get
appropriate
people for the call it may be a good opportunity to do some brainstorming,
particularly
as we don't have ready access to that many machine topologies so testing
any
proposal will be very challenging. Also I fear this space is only going to get
more
complex as systems get larger over the next year or two.
Next week may be too soon for such a discussion though given the
short
notice!
+CC Vincent and Dietmar, but please drag anyone else in who is
relevant to
this discussion.
I might also mention this topic at the LDCG meeting this week to see
if we
can interest from others who might be able to help with data + testing.
Thanks,
Jonathan
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Today's Topics:
- Re: LOD Call notes: 22 March 2022 - vCPU Hotplug Update
(Jonathan Cameron)
Message: 1 Date: Wed, 13 Apr 2022 19:17:32 +0100 From: Jonathan Cameron <Jonathan.Cameron@Huawei.com<mailto:Jonathan.Cameron@Huawei.com
Subject: [Linaro-open-discussions] Re: LOD Call notes: 22 March 2022
vCPU Hotplug Update To: Ilkka Koskinen <ilkka@os.amperecomputing.commailto:ilkka@os.amperecomputing.com
Cc:
linaro-open-discussions@op-lists.linaro.org<mailto:linaro-open-discussi ons
@op-lists.linaro.org> Message-ID: <20220413191732.00000e4e@Huawei.commailto:20220413191732.0000 0e4e@Huawei.com> Content-Type: text/plain; charset="US-ASCII"
On Thu, 31 Mar 2022 11:47:26 -0700 (PDT) Ilkka Koskinen <ilkka@os.amperecomputing.commailto:ilkka@os.amperecomputing.com> wrote:
Hi everyone,
On Tue, 22 Mar 2022, Jonathan Cameron via Linaro-open-discussions
wrote:
Hi All,
A quick set of notes on the discussion on vCPU hotplug.
Great to have Ed join the discussion. If we are going to have further calls on this topic we may want to move the time to be more friendly for the US.
Current status
- ACPI spec change via code first route approved.
- Kernel patches being reworked / rebased by ARM. Expected to be sent
out in 5.19 cycle.
- QEMU patches being updated by Huawei. Will do at least some light
testing and then push out a public git tree so that others can test - will
aim
to do this so it aligns with kernel code availability.
- Ed (Ampere) gave an update to say they are interested in pushing
this
forwards ASAP and have customer / OS vendor engagement which will be very useful in moving towards a complete solution, particularly
ensuring
good test coverage etc.
Noted that current QEMU patches may not cover all corner cases, for example live migration of VMs that have vCPUs hotplugged. Might 'just work' but we haven't tested it yet so probably not.
Given we didn't really add anything on DOE / SPDM over previous
calls,
I don't plan to send out anything on that topic this time.
Thanks to Joyce for hosting the call. If I noted down anything
wrong,
or incomplete let the list know.
Jonathan
Linaro-open-discussions mailing list --
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Thanks for the great meeting and the update! As Ed mentioned (and you wrote above), we're interested in joining the vCPU Hotplug
development.
Hi Ilkka
Great to have you on board for this.
Status wise, on QEMU side we have the new interface up and running (it was a whole 2 lines of code once we'd dealt with some rebasing
related
issues).
Rather more changes were needed to make it work sensibly on top of
Gavin
Shan's QEMU topology configuration patch set. https://lore.kernel.org/qemu-devel/20220403145953.10522-1-gshan@redh at.com/ The code going through some light internal review before we put it up somewhere public. Note it's definitely not production quality code but it is
somewhere
to start from. Given Easter related vacations I doubt we'll get
enough
eyes on it until next week.
We were thrown briefly by the fact there is a recently added apcica/actbl2.h entry for MADT_ONLINE_CAPABLE but it's a different
bit.
Seems x86 folk wanted something similar last year. We'll have to do something ugly in ACPICA to mangle the name for the new bit to avoid that
collision.
Lorenzo, I'm assuming the ACPCIA one line patch to add that define is something the ARM team will deal with?
There are some known limitations though that we'll need to sort out
before
upstreaming the QEMU support. One of which is SVE currently breaks
things.
Plenty of time though as kernel needs to be upstream first anyway.
Testing wise we are using QEMU on top of QEMU so we can poke corners
of
the architecture don't have hardware for (e.g. SVE :). Even on a rubbish
x86
desktop it's not that slow :)
Lorenzo, any update on kernel side of things or expected time scale
for
more information?
Obviously we have some hacked patches based on Salil's original
proposal
that sanity check the QEMU side of things but I suspect the final
version
will look rather different :)
One question on the spec change for Lorenzo. It's not entirely clear but I think we should not be using _MAT when 'hotplugging' the vCPUs? For now the QEMU code provides the relevant entries anyway but it would be nice to drop that if not necessary (it's not a huge amount of code or complexity though so not a big thing either way).
Thanks and an early happy Easter to those celebrating on Sunday.
Jonathan
Br, Ilkka
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