On Tue, 7 Dec 2021 at 11:46, Sudeep Holla sudeep.holla@arm.com wrote:
On Tue, Dec 07, 2021 at 11:27:06AM +0100, Ulf Hansson wrote:
Hi all,
This email intends to ask for potential interest in extending the support for the SCMI perf-domain protocol in the Linux kernel and in the firmware. Please, feel free to ignore this, while a short answer like "sounds interesting" would be sufficient information at this point. Some more details below.
Today, the current support in the Linux kernel for the SCMI perf-domain protocol, is limited to be used for CPU frequency scaling, through the cpufreq subsystem. However, the SCMI perf-domain protocol isn't really limited to CPUs, but fits well for other generic peripheral devices too. By extending the support, we can avoid the need for SoC specific protocols/interfaces, while scaling performance for non-CPU devices.
From the Linux kernel point of view, we already have generic support for DVFS (Dynamic Voltage Frequency Scaling), through a mixture of subsystems/libraries. Without going into details, we should be able to tap into these existing infrastructures, to add support for the SCMI perf-protocol. In this way, the support would be generic and nicely abstracted from lower layer drivers/subsystems.
Thoughts?
Definitely interested. As discussed in some other thread on the list, I am interested in more details on how this will look for CPUs. You did mention about creation of power domains to control these performance domains as one of the proposal. I would like to know what that means for CPUs with OSI cpuidle(as well as PC) which creates power domains already.
Sudeep, thanks for your reply! Good to hear that you are interested in this!
When it comes to the PSCI power domains (OSI or PC mode), controlled by the cpuidle driver - I believe it's probably a good idea to keep those decoupled from a potential SCMI perf "power-domain". A CPU can be part of multiple power domains, one for PSCI (idle) and one for SCMI (perf), for example.
However, I need to explore things more before I can make a formal proposal. At this point, it is mostly ideas floating around in my head.
One thing though, that is related to this, could be to explore a hierarchical power-domain layout, combining a PSCI power domain with an SCMI *power-domain*. Or maybe that layout should entirely be hidden in FW, thus doesn't need to be modeled in DT? What do you think?
In any case, the first step I suggest us looking at, is to try to make the SCMI perf-domain protocol to work for generic peripheral devices too, rather than as currently, being limited to CPUs. Does this make sense to you too?
Kind regards Uffe