Thanks James. I learn a lot from your explanation here. But if online capable bit in GICC can't ensure the related CPU can be bring up, as it can't ensure GICR exist, what benefit we get from this bit? It seems the only way to enable a disabled CPU is that add GICR entry into MADT not by this bit. And how to understand the meaning conveyed by this bit that it indicates the related CPU can be enabled during OS runtime?