Re: [External] : RE: vCPU hotplug/unplug for the ARMv8 processors
by Vishnu Pajjuri
Hi Salil,
Below patch resolves VM live migration CPU stall issues.
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index e9ced9f172..23b06d44cc 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -3224,6 +3224,11 @@ static void virt_cpu_plug(HotplugHandler
*hotplug_dev, DeviceState *dev,
fw_cfg_modify_i16(vms->fw_cfg, FW_CFG_NB_CPUS,
vms->boot_cpus);
cs->disabled = false;
+ if (qemu_enabled_cpu(cs)) {
+ cs->vmcse =
qemu_add_vm_change_state_handler(kvm_arm_vm_state_change, cs);
+ }
+
return;
fail:
error_propagate(errp, local_err);
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 80a456ef16..510f829e4b 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -883,9 +883,6 @@ int kvm_arch_init_vcpu(CPUState *cs)
return -EINVAL;
}
- if (qemu_enabled_cpu(cs))
- cs->vmcse =
qemu_add_vm_change_state_handler(kvm_arm_vm_state_change,
- cs);
/* Determine init features for this CPU */
memset(cpu->kvm_init_features, 0,
sizeof(cpu->kvm_init_features));
Root Cause:
It's too early to attach kvm_arm_vm_state_change handler in
kvm_arch_init_vcpu
since vcpus were not yet enabled at this stage
Because of this, QEMU is not fetching virtual time from KVM before
saving VM state
Also not able to restore virtual time back to KVM after restoring VM state
It is causing misconfiguration of vtimer offset and leading to CPU stall
issues.
Attaching kvm_arm_vm_state_change handler in virt_cpu_plug after
enabling each vCPU
makes more reasonable to me. Any suggestions are welcome here.
This helps to properly configure vtimer offset. And didn't see any
timing issues
_Regards_,
-Vishnu.
On 26-07-2023 15:15, Salil Mehta wrote:
>
> HI Vishnu,
>
> Got it. I think I am now able to recreate the condition successfully
> with just 2 vCPUs and even when all of them are present and online.
>
> I am analyzing the issue and will get back to you soon.
>
> Thanks
>
> Salil
>
> *From:* Vishnu Pajjuri OS <vishnu(a)os.amperecomputing.com>
> *Sent:* Friday, July 21, 2023 10:39 AM
> *To:* Salil Mehta <salil.mehta(a)opnsrc.net>; Salil Mehta
> <salil.mehta(a)huawei.com>
> *Cc:* Vishnu Pajjuri OS <vishnu(a)os.amperecomputing.com>; Miguel Luis
> <miguel.luis(a)oracle.com>
> *Subject:* Re: [External] : RE: vCPU hotplug/unplug for the ARMv8
> processors
>
> Hi Salil,
>
> On 20-07-2023 22:56, Salil Mehta wrote:
>
> [+] For your reference, I am attaching the scripts which I am
> using. Note the subtle difference between both
>
> Thanks for sharing your scripts for VM live migration.
>
>
>
> Thanks!
>
> On Thu, Jul 20, 2023 at 12:57 PM Salil Mehta
> <salil.mehta(a)huawei.com> wrote:
>
> Hi Vishnu,
>
> Aah, I see looks like you have 2 physical machine? I am using
> same host setup and use below commands to migrate VMs
>
> *Src VM (Same Host)*
>
> Qemu> migrate tcp:0:4444
>
> *Dst VM (Same Host)*
>
> $ qemu-arm64-nosmmu[…] incoming tcp:0:4444
>
> I have prepared setup like below on the same Host with the help of
> qemu commands only
>
> [VM1 (P4:C2:H0:U2:O2)] --> [VM2 (P4:C2:H0:U2:O2)] --> [VM3
> (P4:C2:H0:U2:O2)]
>
> From VM1 to VM2 works fine. But when I tried to do live migration from
> VM2(same VM migrated from VM1) to VM3
>
> I observed CPU stall issues in this scenario also.
>
> One more observation is that time is jumping in the VM2 to VM3
> iteration always
>
> [root@fedora ~]# date
> Wed Nov 21 06:34:54 AM EST 2114
>
> VM1.sh
>
> TOPDIR=/home/vishnu/vcpu_hp
> BASECODEPATH=$TOPDIR/pre_v2
> QEMUPATH=$BASECODEPATH/qemu/
> QEMUBIN=$QEMUPATH/build/aarch64-softmmu/qemu-system-aarch64
> ROOTFS_IMG=/home/vishnu/vms/images/vm11.raw
> BIOS=/usr/share/AAVMF/AAVMF_CODE.fd
> LOG_FILE=/tmp/serial1.log
>
> $QEMUBIN -M virt,accel=kvm,gic-version=3 \
> -smp cpus=2,maxcpus=4 \
> -m 4g \
> -cpu host \
> -nodefaults \
> -nographic \
> -drive if=pflash,format=raw,readonly,file=$BIOS \
> -boot c -hda $ROOTFS_IMG \
> -chardev stdio,id=char0,logfile=$LOG_FILE,signal=off \
> -serial chardev:char0 \
> -monitor tcp:127.0.0.1:55555,server,nowait
>
> VM2.sh
>
> TOPDIR=/home/vishnu/vcpu_hp
> BASECODEPATH=$TOPDIR/pre_v2
> QEMUPATH=$BASECODEPATH/qemu/
> QEMUBIN=$QEMUPATH/build/aarch64-softmmu/qemu-system-aarch64
> ROOTFS_IMG=/home/vishnu/vms/images/vm11.raw
> BIOS=/usr/share/AAVMF/AAVMF_CODE.fd
> LOG_FILE=/tmp/serial1.log
>
> $QEMUBIN -M virt,accel=kvm,gic-version=3 \
> -smp cpus=2,maxcpus=4 \
> -m 4g \
> -cpu host \
> -nodefaults \
> -nographic \
> -drive if=pflash,format=raw,readonly,file=$BIOS \
> -boot c -hda $ROOTFS_IMG \
> -chardev stdio,id=char0,logfile=$LOG_FILE,signal=off \
> -serial chardev:char0 \
> -monitor tcp:127.0.0.1:55556,server,nowait \
> -incoming tcp:0:4444
>
> VM3.sh
>
> TOPDIR=/home/vishnu/vcpu_hp
> BASECODEPATH=$TOPDIR/pre_v2
> QEMUPATH=$BASECODEPATH/qemu/
> QEMUBIN=$QEMUPATH/build/aarch64-softmmu/qemu-system-aarch64
> ROOTFS_IMG=/home/vishnu/vms/images/vm11.raw
> BIOS=/usr/share/AAVMF/AAVMF_CODE.fd
> LOG_FILE=/tmp/serial1.log
>
> $QEMUBIN -M virt,accel=kvm,gic-version=3 \
> -smp cpus=2,maxcpus=4 \
> -m 4g \
> -cpu host \
> -nodefaults \
> -nographic \
> -drive if=pflash,format=raw,readonly,file=$BIOS \
> -boot c -hda $ROOTFS_IMG \
> -chardev stdio,id=char0,logfile=$LOG_FILE,signal=off \
> -serial chardev:char0 \
> -monitor tcp:127.0.0.1:55557,server,nowait \
> -incoming tcp:0:4445
>
> Log:-
> [root@fedora ~]# [ 189.884992] rcu: INFO: rcu_sched detected stalls
> on CPUs/tasks:
> [ 189.887474] rcu: 1-...!: (0 ticks this GP) idle=c268/0/0x0
> softirq=13837/13837 fqs=0 (false positive?)
> [ 189.891022] rcu: (detected by 0, t=6002 jiffies, g=7521, q=764
> ncpus=2)
> [ 189.893494] Task dump for CPU 1:
> [ 189.894875] task:swapper/1 state:R running task
> stack:0 pid:0 ppid:1 flags:0x00000008
> [ 189.898597] Call trace:
> [ 189.899505] __switch_to+0xc8/0xf8
> [ 189.900825] 0xffff8000080ebde0
> [ 189.902236] rcu: rcu_sched kthread timer wakeup didn't happen for
> 6001 jiffies! g7521 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402
> [ 189.906499] rcu: Possible timer handling issue on cpu=1
> timer-softirq=3803
> [ 189.909125] rcu: rcu_sched kthread starved for 6002 jiffies! g7521
> f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402 ->cpu=1
> [ 189.912934] rcu: Unless rcu_sched kthread gets sufficient CPU
> time, OOM is now expected behavior.
> [ 189.916226] rcu: RCU grace-period kthread stack dump:
> [ 189.918122] task:rcu_sched state:I stack:0 pid:15
> ppid:2 flags:0x00000008
> [ 189.921241] Call trace:
> [ 189.922165] __switch_to+0xc8/0xf8
> [ 189.923453] __schedule+0x248/0x6c0
> [ 189.924821] schedule+0x58/0xf0
> [ 189.926010] schedule_timeout+0x90/0x178
> [ 189.927483] rcu_gp_fqs_loop+0x124/0x438
> [ 189.928969] rcu_gp_kthread+0x164/0x1c8
> [ 189.930401] kthread+0xe0/0xf0
> [ 189.931544] ret_from_fork+0x10/0x20
> [ 189.932874] rcu: Stack dump where RCU GP kthread last ran:
> [ 189.935207] Task dump for CPU 1:
> [ 189.936338] task:swapper/1 state:R running task
> stack:0 pid:0 ppid:1 flags:0x00000008
> [ 189.939811] Call trace:
> [ 189.940673] __switch_to+0xc8/0xf8
> [ 189.941888] 0xffff8000080ebde0
>
> Lets first use Qemu prompt to migrate instead of web interface
> if you can? This will also help us converge whether problem is
> an interface problem or we are really missing something.
>
> Could you please share your Linux and Qemu source repos as well?
>
> I'll try to figure out if I'm using any wrong source repositories.
>
> _Regards,_
>
> -Vishnu.
>
> Thanks
>
> Salil
>
> *From:* Vishnu Pajjuri OS <vishnu(a)os.amperecomputing.com>
> *Sent:* Thursday, July 20, 2023 12:49 PM
> *To:* Salil Mehta <salil.mehta(a)huawei.com>; Vishnu Pajjuri OS
> <vishnu(a)os.amperecomputing.com>; Miguel Luis
> <miguel.luis(a)oracle.com>
> *Cc:* Salil Mehta <salil.mehta(a)opnsrc.net>
> *Subject:* Re: [External] : RE: vCPU hotplug/unplug for the
> ARMv8 processors
>
> Hi Salil,
>
> On 20-07-2023 16:58, Salil Mehta wrote:
>
> Hi Vishnu,
>
> Can I request you to reduce the number of vCPUs to 6.
>
> Test Case:
>
> [VM1 (P6:C4:H0:U2:O4)] --> [VM2 (P6:C4:H0:U2:O4)]
>
> <Exit from qemu prompt. Restart VM1 and then execute below>
>
> With virsh(libvirt) commands,
>
> After Migrating VM1 to DstHost, there is nothing left on
> SrcHost. Even ps command shows nothing on SrcHost regarding
> qemu command.
>
> So operating VM1 on SrcHost after migrating VM1 to DstHost is
> not possible.
>
> On DstHost side VM1 is live, there I can able to access VM1's
> console.
>
> I can able to manipulate VM1 on DstHost after migration.
>
> _Regards_,
>
> -Vishnu.
>
> [VM1 (P6:C4:H0:U2:O4)] <-- [VM2 (P6:C4:H0:U2:O4)]
>
> [...‘n’ times...]
>
> [VM1 (P6:C4:H0:U2:O4)] --> [VM2 (P6:C4:H0:U2:O4)]
>
> <Exit from qemu prompt. Restart VM1 and then execute below>
>
> [VM1 (P6:C4:H0:U2:O4)] <-- [VM2 (P6:C4:H0:U2:O4)]
>
> Thanks
>
> Salil.
>
> *From:* Vishnu Pajjuri OS <vishnu(a)os.amperecomputing.com>
> <mailto:vishnu@os.amperecomputing.com>
> *Sent:* Thursday, July 20, 2023 12:16 PM
> *To:* Salil Mehta <salil.mehta(a)huawei.com>
> <mailto:salil.mehta@huawei.com>; Vishnu Pajjuri OS
> <vishnu(a)os.amperecomputing.com>
> <mailto:vishnu@os.amperecomputing.com>; Miguel Luis
> <miguel.luis(a)oracle.com> <mailto:miguel.luis@oracle.com>
> *Cc:* Salil Mehta <salil.mehta(a)opnsrc.net>
> <mailto:salil.mehta@opnsrc.net>
> *Subject:* Re: [External] : RE: vCPU hotplug/unplug for
> the ARMv8 processors
>
> Hi Salil,
>
> On 20-07-2023 15:52, Salil Mehta wrote:
>
> Hi Vishnu,
>
>
>
> From: Vishnu Pajjuri OS<vishnu(a)os.amperecomputing.com> <mailto:vishnu@os.amperecomputing.com>
>
> Sent: Tuesday, July 18, 2023 12:39 PM
>
>
>
> [...]
>
>
>
> @Miguel/Vishnu BTW, I was able to reproduce the CPU stall issue and it looks
>
> to me it only happens when number of online vCPUs being migrated at source VM
>
> do not match number of vCPUs being online'd during boot at the destination VM.
>
> This means "maxcpus=N" kernel parameter at the destination VM should have
>
> value equal to number of online'd vCPUs being migrated.
>
>
>
> I still need to check if this matches the x86_64 behavior. If possible, can
>
> you guys confirm below:
>
>
>
> [1] always keep the online vcpus same at source and destination and then wait
>
> and check for the CPU stall messages?
>
> Hopefully below is the test scenario that you are looking at, but still I observed CPU stall issues
>
>
>
> P: Possible vCPUs
>
> C: Cold Plugged vCPUs
>
> H: Hot Plugged vCPUs
>
> U: Unplugged vCPUs
>
> O: Onlined vCPUs
>
> sVM: Source VM
>
> dVM: Destination VM
>
>
>
>
>
> Test Case:
>
> [sVM (P80:C72:H0:U8:O72)] --> [dVM (P80:C72:H0:U8:O72)] - PASS
>
>
>
> Migrate the same VM back
>
>
>
> [sVM (P80:C72:H0:U8:O72)] <-- [dVM (P80:C72:H0:U8:O72)] - Observed CPU stalls on VM
>
>
>
>
>
> I have now repeated above scenario at-least 5 times and cannot reproduce stalls
>
> in the case you have mentioned.
>
> Good hear that you didn't observed any CPU stall issues
> with your setup.
>
> I'm using virsh commands to create VM live setup. If
> possible I'll adapt your qemu commands to libvirt,
>
> Otherwise I would like to reproduce your setup,
>
> for that could you please provide your kernel and qemu repo's
>
> Also your complete Qemu command of VM launch and migration
>
> Commands you have been using both at source and
> destination side?
>
>
>
> Few questions:
>
> Q1: In above case, there is no Hotplug happening at all - right?
>
> Ans: Yes
>
>
>
> Q2: Do you restart the source VM after it has been migrated once to the destination?
>
> Ans: No.
>
>
>
> Q3: Can you please paste your complete Qemu command of VM launch and migration
>
> Commands you have been using both at source and destination side?
>
> Ans: I'm using virsh commands to migrate VMs
>
> *Commands on SrcHost:*
>
> *qemu command after running with virsh command:*
>
> virsh start vm1 --console
>
> /usr/local/bin/qemu-system-aarch64 -name
> guest=vm1,debug-threads=on -S -object
> {"qom-type":"secret","id":"masterKey0","format":"raw","file":"/var/lib/libvirt/qemu/domain-4-vm1/master-key.aes"}
> -blockdev
> {"driver":"file","filename":"/usr/share/edk2/aarch64/QEMU_EFI-silent-pflash.raw","node-name":"libvirt-pflash0-storage","auto-read-only":true,"discard":"unmap"}
> -blockdev
> {"node-name":"libvirt-pflash0-format","read-only":true,"driver":"raw","file":"libvirt-pflash0-storage"}
> -blockdev
> {"driver":"file","filename":"/var/lib/libvirt/qemu/nvram/vm1_VARS.fd","node-name":"libvirt-pflash1-storage","auto-read-only":true,"discard":"unmap"}
> -blockdev
> {"node-name":"libvirt-pflash1-format","read-only":false,"driver":"raw","file":"libvirt-pflash1-storage"}
> -machine
> virt-7.2,usb=off,dump-guest-core=off,gic-version=3,pflash0=libvirt-pflash0-format,pflash1=libvirt-pflash1-format,memory-backend=mach-virt.ram
> -accel kvm -cpu host -m 32768 -object
> {"qom-type":"memory-backend-ram","id":"mach-virt.ram","size":34359738368}
> -overcommit mem-lock=off -smp
> 2,maxcpus=4,sockets=1,dies=1,cores=4,threads=1 -uuid
> ea78094e-de32-4caa-827d-7628afff6524 -display none
> -no-user-config -nodefaults -chardev
> socket,id=charmonitor,fd=23,server=on,wait=off -mon
> chardev=charmonitor,id=monitor,mode=control -rtc base=utc
> -no-shutdown -boot strict=on -device
> {"driver":"pcie-root-port","port":8,"chassis":1,"id":"pci.1","bus":"pcie.0","multifunction":true,"addr":"0x1"}
> -device
> {"driver":"pcie-root-port","port":9,"chassis":2,"id":"pci.2","bus":"pcie.0","addr":"0x1.0x1"}
> -device
> {"driver":"pcie-root-port","port":10,"chassis":3,"id":"pci.3","bus":"pcie.0","addr":"0x1.0x2"}
> -device
> {"driver":"pcie-root-port","port":11,"chassis":4,"id":"pci.4","bus":"pcie.0","addr":"0x1.0x3"}
> -device
> {"driver":"pcie-root-port","port":12,"chassis":5,"id":"pci.5","bus":"pcie.0","addr":"0x1.0x4"}
> -device
> {"driver":"pcie-root-port","port":13,"chassis":6,"id":"pci.6","bus":"pcie.0","addr":"0x1.0x5"}
> -device
> {"driver":"pcie-root-port","port":14,"chassis":7,"id":"pci.7","bus":"pcie.0","addr":"0x1.0x6"}
> -device
> {"driver":"pcie-root-port","port":15,"chassis":8,"id":"pci.8","bus":"pcie.0","addr":"0x1.0x7"}
> -device
> {"driver":"pcie-root-port","port":16,"chassis":9,"id":"pci.9","bus":"pcie.0","multifunction":true,"addr":"0x2"}
> -device
> {"driver":"pcie-root-port","port":17,"chassis":10,"id":"pci.10","bus":"pcie.0","addr":"0x2.0x1"}
> -device
> {"driver":"pcie-root-port","port":18,"chassis":11,"id":"pci.11","bus":"pcie.0","addr":"0x2.0x2"}
> -device
> {"driver":"pcie-root-port","port":19,"chassis":12,"id":"pci.12","bus":"pcie.0","addr":"0x2.0x3"}
> -device
> {"driver":"pcie-root-port","port":20,"chassis":13,"id":"pci.13","bus":"pcie.0","addr":"0x2.0x4"}
> -device
> {"driver":"pcie-root-port","port":21,"chassis":14,"id":"pci.14","bus":"pcie.0","addr":"0x2.0x5"}
> -device
> {"driver":"qemu-xhci","p2":15,"p3":15,"id":"usb","bus":"pci.2","addr":"0x0"}
> -device
> {"driver":"virtio-scsi-pci","id":"scsi0","bus":"pci.3","addr":"0x0"}
> -device
> {"driver":"virtio-serial-pci","id":"virtio-serial0","bus":"pci.4","addr":"0x0"}
> -blockdev
> {"driver":"file","filename":"/mnt/nfs/vm11.raw","node-name":"libvirt-2-storage","auto-read-only":true,"discard":"unmap"}
> -blockdev
> {"node-name":"libvirt-2-format","read-only":false,"discard":"unmap","driver":"raw","file":"libvirt-2-storage"}
> -device
> {"driver":"virtio-blk-pci","bus":"pci.5","addr":"0x0","drive":"libvirt-2-format","id":"virtio-disk0","bootindex":1}
> -blockdev
> {"driver":"file","filename":"/home/vishnu/vms/Fedora-Server-dvd-aarch64-36-1.5.iso","node-name":"libvirt-1-storage","auto-read-only":true,"discard":"unmap"}
> -blockdev
> {"node-name":"libvirt-1-format","read-only":true,"driver":"raw","file":"libvirt-1-storage"}
> -device
> {"driver":"scsi-cd","bus":"scsi0.0","channel":0,"scsi-id":0,"lun":0,"device_id":"drive-scsi0-0-0-0","drive":"libvirt-1-format","id":"scsi0-0-0-0"}
> -netdev tap,fd=24,vhost=on,vhostfd=26,id=hostnet0 -device
> {"driver":"virtio-net-pci","netdev":"hostnet0","id":"net0","mac":"52:54:00:4d:8d:9e","bus":"pci.1","addr":"0x0"}
> -chardev pty,id=charserial0 -serial chardev:charserial0
> -chardev socket,id=charchannel0,fd=22,server=on,wait=off
> -device
> {"driver":"virtserialport","bus":"virtio-serial0.0","nr":1,"chardev":"charchannel0","id":"channel0","name":"org.qemu.guest_agent.0"}
> -chardev
> socket,id=chrtpm,path=/run/libvirt/qemu/swtpm/4-vm1-swtpm.sock
> -tpmdev emulator,id=tpm-tpm0,chardev=chrtpm -device
> {"driver":"tpm-tis-device","tpmdev":"tpm-tpm0","id":"tpm0"}
> -audiodev {"id":"audio1","driver":"none"} -device
> {"driver":"virtio-balloon-pci","id":"balloon0","bus":"pci.6","addr":"0x0"}
> -object
> {"qom-type":"rng-random","id":"objrng0","filename":"/dev/urandom"}
> -device
> {"driver":"virtio-rng-pci","rng":"objrng0","id":"rng0","bus":"pci.7","addr":"0x0"}
> -msg timestamp=on
>
> *virsh command to migrate vm1 from SrcHost to DstHost *
>
> virsh migrate --live vm1 qemu+ssh://vCPU-HP-Host2/system
> --unsafe --verbose
>
> *Commands on DstHost:*
>
> *qemu command after vm1 migrated to DstHost:*
>
> /usr/local/bin/qemu-system-aarch64 -name
> guest=vm1,debug-threads=on -S -object
> {"qom-type":"secret","id":"masterKey0","format":"raw","file":"/var/lib/libvirt/qemu/domain-1-vm1/master-key.aes"}
> -blockdev
> {"driver":"file","filename":"/usr/share/edk2/aarch64/QEMU_EFI-silent-pflash.raw","node-name":"libvirt-pflash0-storage","auto-read-only":true,"discard":"unmap"}
> -blockdev
> {"node-name":"libvirt-pflash0-format","read-only":true,"driver":"raw","file":"libvirt-pflash0-storage"}
> -blockdev
> {"driver":"file","filename":"/var/lib/libvirt/qemu/nvram/vm1_VARS.fd","node-name":"libvirt-pflash1-storage","auto-read-only":true,"discard":"unmap"}
> -blockdev
> {"node-name":"libvirt-pflash1-format","read-only":false,"driver":"raw","file":"libvirt-pflash1-storage"}
> -machine
> virt-7.2,usb=off,gic-version=3,dump-guest-core=off,memory-backend=mach-virt.ram,pflash0=libvirt-pflash0-format,pflash1=libvirt-pflash1-format
> -accel kvm -cpu host -m 32768 -object
> {"qom-type":"memory-backend-ram","id":"mach-virt.ram","size":34359738368}
> -overcommit mem-lock=off -smp
> 2,maxcpus=4,sockets=1,dies=1,cores=4,threads=1 -uuid
> ea78094e-de32-4caa-827d-7628afff6524 -display none
> -no-user-config -nodefaults -chardev
> socket,id=charmonitor,fd=23,server=on,wait=off -mon
> chardev=charmonitor,id=monitor,mode=control -rtc base=utc
> -no-shutdown -boot strict=on -device
> {"driver":"pcie-root-port","port":8,"chassis":1,"id":"pci.1","bus":"pcie.0","multifunction":true,"addr":"0x1"}
> -device
> {"driver":"pcie-root-port","port":9,"chassis":2,"id":"pci.2","bus":"pcie.0","addr":"0x1.0x1"}
> -device
> {"driver":"pcie-root-port","port":10,"chassis":3,"id":"pci.3","bus":"pcie.0","addr":"0x1.0x2"}
> -device
> {"driver":"pcie-root-port","port":11,"chassis":4,"id":"pci.4","bus":"pcie.0","addr":"0x1.0x3"}
> -device
> {"driver":"pcie-root-port","port":12,"chassis":5,"id":"pci.5","bus":"pcie.0","addr":"0x1.0x4"}
> -device
> {"driver":"pcie-root-port","port":13,"chassis":6,"id":"pci.6","bus":"pcie.0","addr":"0x1.0x5"}
> -device
> {"driver":"pcie-root-port","port":14,"chassis":7,"id":"pci.7","bus":"pcie.0","addr":"0x1.0x6"}
> -device
> {"driver":"pcie-root-port","port":15,"chassis":8,"id":"pci.8","bus":"pcie.0","addr":"0x1.0x7"}
> -device
> {"driver":"pcie-root-port","port":16,"chassis":9,"id":"pci.9","bus":"pcie.0","multifunction":true,"addr":"0x2"}
> -device
> {"driver":"pcie-root-port","port":17,"chassis":10,"id":"pci.10","bus":"pcie.0","addr":"0x2.0x1"}
> -device
> {"driver":"pcie-root-port","port":18,"chassis":11,"id":"pci.11","bus":"pcie.0","addr":"0x2.0x2"}
> -device
> {"driver":"pcie-root-port","port":19,"chassis":12,"id":"pci.12","bus":"pcie.0","addr":"0x2.0x3"}
> -device
> {"driver":"pcie-root-port","port":20,"chassis":13,"id":"pci.13","bus":"pcie.0","addr":"0x2.0x4"}
> -device
> {"driver":"pcie-root-port","port":21,"chassis":14,"id":"pci.14","bus":"pcie.0","addr":"0x2.0x5"}
> -device
> {"driver":"qemu-xhci","p2":15,"p3":15,"id":"usb","bus":"pci.2","addr":"0x0"}
> -device
> {"driver":"virtio-scsi-pci","id":"scsi0","bus":"pci.3","addr":"0x0"}
> -device
> {"driver":"virtio-serial-pci","id":"virtio-serial0","bus":"pci.4","addr":"0x0"}
> -blockdev
> {"driver":"file","filename":"/mnt/nfs/vm11.raw","node-name":"libvirt-2-storage","auto-read-only":true,"discard":"unmap"}
> -blockdev
> {"node-name":"libvirt-2-format","read-only":false,"discard":"unmap","driver":"raw","file":"libvirt-2-storage"}
> -device
> {"driver":"virtio-blk-pci","bus":"pci.5","addr":"0x0","drive":"libvirt-2-format","id":"virtio-disk0","bootindex":1}
> -blockdev
> {"driver":"file","filename":"/home/vishnu/vms/Fedora-Server-dvd-aarch64-36-1.5.iso","node-name":"libvirt-1-storage","auto-read-only":true,"discard":"unmap"}
> -blockdev
> {"node-name":"libvirt-1-format","read-only":true,"driver":"raw","file":"libvirt-1-storage"}
> -device
> {"driver":"scsi-cd","bus":"scsi0.0","channel":0,"scsi-id":0,"lun":0,"device_id":"drive-scsi0-0-0-0","drive":"libvirt-1-format","id":"scsi0-0-0-0"}
> -netdev
> {"type":"tap","fd":"24","vhost":true,"vhostfd":"26","id":"hostnet0"}
> -device
> {"driver":"virtio-net-pci","netdev":"hostnet0","id":"net0","mac":"52:54:00:4d:8d:9e","bus":"pci.1","addr":"0x0"}
> -chardev pty,id=charserial0 -serial chardev:charserial0
> -chardev socket,id=charchannel0,fd=22,server=on,wait=off
> -device
> {"driver":"virtserialport","bus":"virtio-serial0.0","nr":1,"chardev":"charchannel0","id":"channel0","name":"org.qemu.guest_agent.0"}
> -chardev
> socket,id=chrtpm,path=/run/libvirt/qemu/swtpm/1-vm1-swtpm.sock
> -tpmdev emulator,id=tpm-tpm0,chardev=chrtpm -device
> {"driver":"tpm-tis-device","tpmdev":"tpm-tpm0","id":"tpm0"}
> -audiodev {"id":"audio1","driver":"none"} -incoming defer
> -device
> {"driver":"virtio-balloon-pci","id":"balloon0","bus":"pci.6","addr":"0x0"}
> -object
> {"qom-type":"rng-random","id":"objrng0","filename":"/dev/urandom"}
> -device
> {"driver":"virtio-rng-pci","rng":"objrng0","id":"rng0","bus":"pci.7","addr":"0x0"}
> -msg timestamp=on
>
> *virsh command to migrate vm1 back to SrcHost: *
>
> # virsh migrate --live vm1 qemu+ssh://vCPU-HP-Host1/system
> --unsafe --verbose
>
>
>
>
>
> Thanks
>
> Salil.
>
>
>
>
>
>
>
>
>
8 months, 2 weeks
- 1
- 0
MPAM buglet..
by Jonathan Cameron
Given you mentioned rebasing MPAM :) One trivial bug that might still be hanging around.
When adding resources parsed from the MPAM ACPI table I think you are adding one byte
too much for IORESOURCE_MEM
https://git.kernel.org/pub/scm/linux/kernel/git/morse/linux.git/tree/driver…
should be a -1 similar to IORT handling.
https://elixir.bootlin.com/linux/latest/source/drivers/acpi/arm64/iort.c#L1…
As a side note, I'm emulating MPAM on QEMU so I can poke the corners of the code
beyond the real implementations we have access to and in a fashion I can talk about
more freely.
Other than the above, mostly seems to be working fine beyond a bug in the upstream
PPTT parsing code that doesn't affect what you have implemented so far.
There is an infinite loop / deadlock hiding somewhere though in one of the error paths
though that I haven't chased down yet. Maybe I'll be lucky and you've fixed it already :)
It's holiday season so might take a while to get the QEMU implementation finished / through
internal review - but I'll post any bugs I find in the meantime.
Jonathan
8 months, 3 weeks
- 3
- 6
ARM64 vCPU Hotplug Kernel patches for discussion in community?
by Salil Mehta
Hi James,
Are you planning to push the next version (-V2) of vCPU Hotplug kernel changes to the community?
Is it possible to figure out any blockers on your end which are restricting you to move ahead.
I think kernel can move even when Qemu patches have not been pushed to community and
are only shared as repository. Though I shall been posting them soon.
It would be better if we can get kernel patches in discussion and then hope for their acceptance
as soon as possible. This is very important for acceptance of Qemu patches and to be frank
for anybody to take Qemu patches seriously even for discussion.
Many thanks
Salil.
9 months
- 2
- 2
[Question] Regarding the new _OSC capability to negotiate type of CPU Hotplug support (i.e. present/enable)
by Salil Mehta
Hi James,
Few questions related to new _OSC capabilities to negotiate the type of CPU hotplug(if any):
Q1: ACPI Standard Update: Do we have any Bugzilla-id for the change related to these new
_OSC capabilities for the type of CPU hotplug support (i.e. Enabled/Present cpu)?
Q2: Have you intentionally omitted below function in the _OSC related kernel change
shared in the repository [1]?
bool acpi_processor_hotplug_enabled_supported(void)
Q3: I am sure you would want to extend usage of these APIs in the acpi_processor.c as
well to decide what kind of hotplug (if any) is enabled? Is code related to _OSC changes
complete?
[1] https://gitlab.arm.com/linux-arm/linux-jm/-/commit/220b0d8b0261d7467c8705e6…
Thanks
Salil
9 months
- 3
- 13
[Question - ARM CCA] Regarding vCPU Hotplug Support in ARM Realm world
by Salil Mehta
Hi James,
I recently got a chance to look into the ARM CCA specifications. And if I understood correctly then
in Realm world PSCI is managed by RMM but the Realm vCPUs are taken care by the host.
As per our recent changes we handle the SMC/HVC hyper call exits in user-space. If the VMs
are to run in Realm world and vCPU Hotplug needs to be supported then do we need
to consider any change there?
Thanks
Salil
9 months
- 2
- 2
Re: Linaro-open-discussions Digest, Vol 34, Issue 3
by Joyce Qi
Hi Jonathan，James，Salil，all
Any topics we want to sync during next LOD meeting？
Thanks：）
Joyce
在
2023年7月13日，上午8:00，linaro-open-discussions-request@op-lists.linaro.or
g 写道：
Send Linaro-open-discussions mailing list submissions to
linaro-open-discussions(a)op-lists.linaro.org
To subscribe or unsubscribe via email, send a message with subject
or
body 'help' to
linaro-open-discussions-request(a)op-lists.linaro.org
You can reach the person managing the list at
linaro-open-discussions-owner(a)op-lists.linaro.org
When replying, please edit your Subject line so it is more specific
than "Re: Contents of Linaro-open-discussions digest..."
Today's Topics:
1. Re: FYI: KVMForum2023 Conference Talk slides - "Virtual CPU
Hotplug Support on ARM64"
(Joyce Qi)
2. Re: Linaro-open-discussions Digest, Vol 33, Issue 19 (Yicong
Yang)
3. FYI: KVMForum2023 Conference Talk slides - "Virtual CPU Hotplug
Support on ARM64"
(Salil Mehta)
4. Re: [PATCH V3 1/1] qemu_v8: add support to run secondary OP-TEE
(Shiju Jose)
--------------------------------------------------------------------
--
Message: 1
Date: Wed, 12 Jul 2023 10:06:24 +0800
From: Joyce Qi <joyce.qi(a)linaro.org>
Subject: [Linaro-open-discussions] Re: FYI: KVMForum2023 Conference
Talk slides - "Virtual CPU Hotplug Support on ARM64"
To: Salil Mehta <salil.mehta(a)huawei.com>
Cc: "linaro-open-discussions(a)op-lists.linaro.org"
<linaro-open-discussions(a)op-lists.linaro.org>, "james.morse(a)arm.com"
<james.morse(a)arm.com>, Jean-Philippe Brucker
<jean-philippe.brucker(a)arm.com>, "lorenzo.pieralisi(a)linaro.org"
<lorenzo.pieralisi(a)linaro.org>, Lorenzo Pieralisi
<lpieralisi(a)kernel.org>, zhukeqian <zhukeqian1(a)huawei.com>,
"wangxiongfeng (C)" <wangxiongfeng2(a)huawei.com>, Miguel Luis
<miguel.luis(a)oracle.com>, Vishnu Pajjuri
<vishnu(a)amperemail.onmicrosoft.com>,
"darren(a)amperemail.onmicrosoft.com"
<darren(a)amperemail.onmicrosoft.com>,
"ilkka(a)amperemail.onmicrosoft.com"
<ilkka(a)amperemail.onmicrosoft.com>,
Catalin Marinas <catalin.marinas(a)arm.com>, Marc Zyngier
<maz(a)kernel.org>, Will Deacon <will(a)kernel.org>, Karl Heubaum
<karl.heubaum(a)oracle.com>, Russell King <linux(a)armlinux.org.uk>,
"salil.mehta(a)opnsrc.net" <salil.mehta(a)opnsrc.net>, Peter Maydell
<peter.maydell(a)linaro.org>, Sudeep Holla <sudeep.holla(a)arm.com>,
Suzuki K Poulose <suzuki.poulose(a)arm.com>
Message-ID: <AB9B6479-BAA8-4976-B670-757B461A3B7E(a)linaro.org>
Content-Type: text/plain; charset=gb2312
Hi Salil，
Thanks for sharing, uploaded to the meeting minutes on June 7.
https://linaro.atlassian.net/wiki/spaces/LOD/pages/28933292085/2023-
06-07+Meeting+Minutes+Notes
在 2023年7月12日，上午2:22，Salil Mehta <salil.mehta(a)huawei.com> 写道：
Hello,
Slides (Qemu + Kernel) and video related to our "Virtual CPU Hotplug
presentation" recently concluded
at KVMForum2023 Conference are now available at the below link:
Link: https://kvm-forum.qemu.org/2023/talk/9SMPDQ/
Many thanks to everyone who has contributed to the project so far!
Best regards
Salil
<KVMForum2023-virtual-cpu-hotplug-kernel-slides.pdf><KVMForum2023-vi
rtual-cpu-hotplug-qemu-slides.pdf>
Thanks:)
Joyce
------------------------------
Message: 2
Date: Tue, 11 Jul 2023 20:28:19 +0800
From: Yicong Yang <yangyicong(a)huawei.com>
Subject: [Linaro-open-discussions] Re: Linaro-open-discussions
Digest,
Vol 33, Issue 19
To: Joyce Qi <joyce.qi(a)linaro.org>, Lorenzo Pieralisi
<lorenzo.pieralisi(a)linaro.org>
Cc: yangyicong(a)hisilicon.com, James Morse <james.morse(a)arm.com>,
James
Morse via Linaro-open-discussions
<linaro-open-discussions(a)op-lists.linaro.org>,
"wangkefeng.wang(a)huawei.com" <wangkefeng.wang(a)huawei.com>,
tanxiaofei
<tanxiaofei(a)huawei.com>, tongtiangen(a)huawei.com
Message-ID: <b00be3fe-968f-5116-2711-ad77a4ea7f71(a)huawei.com>
Content-Type: text/plain; charset="gbk"
Hi,
Thanks for organizing the meeting and thanks for the discussion.
Attached the material talked
on the meeting as well as the meeting minutes at the last.
Thanks,
Yicong
On 2023/7/10 23:03, Joyce Qi wrote:
Hi Lorenzo，
Thanks for attending and invite James to join.
Just resend the calendar.
Also invited Yicong to join.
Thanks:)
Joyce
在 2023年7月10日，下午10:34，Lorenzo Pieralisi
<lorenzo.pieralisi(a)linaro.org> 写道：
On Mon, 10 Jul 2023 at 16:32, Lorenzo Pieralisi
<lorenzo.pieralisi(a)linaro.org> wrote:
On Mon, 10 Jul 2023 at 16:24, Joyce Qi via Linaro-open-discussions
<linaro-open-discussions(a)op-lists.linaro.org> wrote:
Hi all,
Just reminder that we will have the Open Discussion on July 11th on
the memory and RAS related topics.
@James, Lorenz,
Will you be able to join?
Is it possible please to resend a calendar invite ?
Thanks,
Lorenzo
Yes, I will - I CC'ed James, hopefully also the Huawei folks will be
there
otherwise there is no point since they raised the topics.
Please let us know,
Lorenzo
.
------------------------------
Message: 3
Date: Tue, 11 Jul 2023 18:22:04 +0000
From: Salil Mehta <salil.mehta(a)huawei.com>
Subject: [Linaro-open-discussions] FYI: KVMForum2023 Conference Talk
slides - "Virtual CPU Hotplug Support on ARM64"
To: "linaro-open-discussions(a)op-lists.linaro.org"
<linaro-open-discussions(a)op-lists.linaro.org>, Joyce Qi
<joyce.qi(a)linaro.org>
Cc: "james.morse(a)arm.com" <james.morse(a)arm.com>, Jean-Philippe
Brucker
<jean-philippe.brucker(a)arm.com>, "lorenzo.pieralisi(a)linaro.org"
<lorenzo.pieralisi(a)linaro.org>, Lorenzo Pieralisi
<lpieralisi(a)kernel.org>, zhukeqian <zhukeqian1(a)huawei.com>,
"wangxiongfeng (C)" <wangxiongfeng2(a)huawei.com>, Miguel Luis
<miguel.luis(a)oracle.com>, Vishnu Pajjuri
<vishnu(a)amperemail.onmicrosoft.com>,
"darren(a)amperemail.onmicrosoft.com"
<darren(a)amperemail.onmicrosoft.com>,
"ilkka(a)amperemail.onmicrosoft.com"
<ilkka(a)amperemail.onmicrosoft.com>,
Catalin Marinas <catalin.marinas(a)arm.com>, Marc Zyngier
<maz(a)kernel.org>, Will Deacon <will(a)kernel.org>, Karl Heubaum
<karl.heubaum(a)oracle.com>, Russell King <linux(a)armlinux.org.uk>,
"salil.mehta(a)opnsrc.net" <salil.mehta(a)opnsrc.net>, Peter Maydell
<peter.maydell(a)linaro.org>, Sudeep Holla <sudeep.holla(a)arm.com>,
Suzuki K Poulose <suzuki.poulose(a)arm.com>
Message-ID: <42340fd4b86747809a955c81fe6be8b5(a)huawei.com>
Content-Type: text/plain; charset="us-ascii"
Hello,
Slides (Qemu + Kernel) and video related to our "Virtual CPU Hotplug
presentation" recently concluded
at KVMForum2023 Conference are now available at the below link:
Link: https://kvm-forum.qemu.org/2023/talk/9SMPDQ/
Many thanks to everyone who has contributed to the project so far!
Best regards
Salil
------------------------------
Message: 4
Date: Wed, 12 Jul 2023 10:17:11 +0000
From: Shiju Jose <shiju.jose(a)huawei.com>
Subject: [Linaro-open-discussions] Re: [PATCH V3 1/1] qemu_v8: add
support to run secondary OP-TEE
To: Jens Wiklander <jens.wiklander(a)linaro.org>
Cc: "linaro-open-discussions(a)op-lists.linaro.org"
<linaro-open-discussions(a)op-lists.linaro.org>,
"Olivier.Deprez(a)arm.com" <Olivier.Deprez(a)arm.com>, Linuxarm
<linuxarm(a)huawei.com>, "zhouguangwei (C)" <zhouguangwei5(a)huawei.com>
Message-ID: <d550a78261ec447f8b2d8c62e92ab584(a)huawei.com>
Content-Type: text/plain; charset="utf-8"
Hi Jens,
-----Original Message-----
From: Jens Wiklander <jens.wiklander(a)linaro.org>
Sent: 11 July 2023 10:02
To: Shiju Jose <shiju.jose(a)huawei.com>
Cc: linaro-open-discussions(a)op-lists.linaro.org;
Olivier.Deprez(a)arm.com;
Linuxarm <linuxarm(a)huawei.com>; Jonathan Cameron
<jonathan.cameron(a)huawei.com>; Zengtao (B)
<prime.zeng(a)hisilicon.com>;
zhouguangwei (C) <zhouguangwei5(a)huawei.com>
Subject: Re: [PATCH V3 1/1] qemu_v8: add support to run secondary
OP-TEE
Hi,
On Mon, Jun 26, 2023 at 1:13 PM <shiju.jose(a)huawei.com> wrote:
From: Shiju Jose <shiju.jose(a)huawei.com>
Add changes to run a secondary OP-TEE at S-EL1 for SPMC_AT_EL=2,
where
Hafnium is loaded at S-EL2.
Signed-off-by: Shiju Jose <shiju.jose(a)huawei.com>
With https://github.com/OP-TEE/build/pull/663 I'm trying to upstream
the
Hafnium setup. Once that's merged please create a pull request
against
https://github.com/OP-TEE/build and we can continue reviewing this
patch
there.
Sure.
Thanks,
Shiju
Thanks,
Jens
...
2.25.1
------------------------------
Subject: Digest Footer
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To unsubscribe send an email to
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------------------------------
End of Linaro-open-discussions Digest, Vol 34, Issue 3
******************************************************
9 months, 1 week
- 1
- 0
[PATCH V3 1/1] qemu_v8: add support to run secondary OP-TEE
by shiju.jose＠huawei.com
From: Shiju Jose <shiju.jose(a)huawei.com>
Add changes to run a secondary OP-TEE at S-EL1 for SPMC_AT_EL=2,
where Hafnium is loaded at S-EL2.
Signed-off-by: Shiju Jose <shiju.jose(a)huawei.com>
Changes:
V2 -> V3
1. Changes w.r.t the relocatable OP-TEE support.
2. Remove building of secondary OP-TEE as the primary OP-TEE
binary use as the secondary OP-TEE as well.
V1 -> V2
1. Changed patch subject and patch description.
2. Fix for the comments from Jens Wiklander by adding separate
build flags and build path for the secondary OP-TEE.
---
qemu_v8/optee_sp_manifest.dts | 9 ++++
qemu_v8/secondary_optee_sp_manifest.dts | 55 +++++++++++++++++++++++++
qemu_v8/sp_layout.json | 4 ++
qemu_v8/spmc_el2_manifest.dts | 10 ++++-
qemu_v8/tb_fw_config.dts | 4 ++
5 files changed, 81 insertions(+), 1 deletion(-)
create mode 100644 qemu_v8/secondary_optee_sp_manifest.dts
diff --git a/qemu_v8/optee_sp_manifest.dts b/qemu_v8/optee_sp_manifest.dts
index e576295..7ffdea5 100644
--- a/qemu_v8/optee_sp_manifest.dts
+++ b/qemu_v8/optee_sp_manifest.dts
@@ -29,6 +29,9 @@
messaging-method = <0x3>; /* Direct messaging only */
ns-interrupts-action = <1>; /* NS_ACTION_ME */
+ /* mem-size OP-TEE specific binding. */
+ mem-size = <0x700000>;
+
/* Boot protocol */
gp-register-num = <0x0>;
@@ -43,4 +46,10 @@
interrupts = <0x28 0xb01>;
};
};
+
+ /* Boot Info */
+ boot-info {
+ compatible = "arm,ffa-manifest-boot-info";
+ ffa_manifest;
+ };
};
diff --git a/qemu_v8/secondary_optee_sp_manifest.dts b/qemu_v8/secondary_optee_sp_manifest.dts
new file mode 100644
index 0000000..0d22da8
--- /dev/null
+++ b/qemu_v8/secondary_optee_sp_manifest.dts
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2020, Arm Limited. All rights reserved.
+ * Copyright (c) 2022, Linaro Limited
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * This file is a Partition Manifest (PM) for a minimal Secure Partition (SP)
+ * that has additional optional properties defined.
+ *
+ */
+
+/dts-v1/;
+
+/ {
+ compatible = "arm,ffa-manifest-1.0";
+
+ /* Properties */
+ description = "sec-op-tee";
+ ffa-version = <0x00010001>; /* 31:16 - Major, 15:0 - Minor */
+ uuid = <0xe4b5f42f 0xed112faf 0x3351d7b9 0xe9cc99fc>;
+ id = <1>;
+ execution-ctx-count = <8>;
+ exception-level = <2>; /* S-EL1 */
+ execution-state = <0>; /* AARCH64 */
+ load-address = <0xea00000>;
+ entrypoint-offset = <0x4000>;
+ xlat-granule = <0>; /* 4KiB */
+ boot-order = <0>;
+ messaging-method = <0x3>; /* Direct messaging only */
+ ns-interrupts-action = <1>; /* NS_ACTION_ME */
+
+ /* mem-size OP-TEE specific binding. */
+ mem-size = <0x600000>;
+
+ /* Boot protocol */
+ gp-register-num = <0x0>;
+
+ device-regions {
+ compatible = "arm,ffa-manifest-device-regions";
+
+ uart1 {
+ base-address = <0x00000000 0x09040000>;
+ pages-count = <1>;
+ attributes = <0x3>; /* read-write */
+ /* SPI, level-triggered, secure, priority=1 */
+ interrupts = <0x28 0xb01>;
+ };
+ };
+
+ /* Boot Info */
+ boot-info {
+ compatible = "arm,ffa-manifest-boot-info";
+ ffa_manifest;
+ };
+};
diff --git a/qemu_v8/sp_layout.json b/qemu_v8/sp_layout.json
index c6a02a9..4054542 100644
--- a/qemu_v8/sp_layout.json
+++ b/qemu_v8/sp_layout.json
@@ -2,5 +2,9 @@
"op-tee" : {
"image": "../../optee_os/out/arm/core/tee-pager_v2.bin",
"pm": "optee_sp_manifest.dts"
+ },
+ "sec-op-tee" : {
+ "image": "../../optee_os/out/arm/core/tee-pager_v2.bin",
+ "pm": "secondary_optee_sp_manifest.dts"
}
}
diff --git a/qemu_v8/spmc_el2_manifest.dts b/qemu_v8/spmc_el2_manifest.dts
index 7acaa38..5ad23dc 100644
--- a/qemu_v8/spmc_el2_manifest.dts
+++ b/qemu_v8/spmc_el2_manifest.dts
@@ -30,7 +30,15 @@
load_address = <0xe300000>;
debug_name = "op-tee";
vcpu_count = <4>;
- mem_size = <0xd00000>;
+ mem_size = <0x700000>;
+ };
+
+ vm2 {
+ is_ffa_partition;
+ load_address = <0xea00000>;
+ debug_name = "sec-op-tee";
+ vcpu_count = <4>;
+ mem_size = <0x600000>;
};
};
diff --git a/qemu_v8/tb_fw_config.dts b/qemu_v8/tb_fw_config.dts
index 68f7b3b..ce3c26a 100644
--- a/qemu_v8/tb_fw_config.dts
+++ b/qemu_v8/tb_fw_config.dts
@@ -14,5 +14,9 @@
uuid = "486178e0-e7f8-11e3-bc5e-0002a5d5c51b";
load-address = <0xe300000>;
};
+ sec-op-tee {
+ uuid = "2ff4b5e4-af2f-11ed-b9d7-5133fc99cce9";
+ load-address = <0xea00000>;
+ };
};
};
--
2.25.1
9 months, 2 weeks
- 3
- 2
FYI: KVMForum2023 Conference Talk slides - "Virtual CPU Hotplug Support on ARM64"
by Salil Mehta
Hello,
Slides (Qemu + Kernel) and video related to our "Virtual CPU Hotplug presentation" recently concluded
at KVMForum2023 Conference are now available at the below link:
Link: https://kvm-forum.qemu.org/2023/talk/9SMPDQ/
Many thanks to everyone who has contributed to the project so far!
Best regards
Salil
9 months, 2 weeks
- 2
- 1
Re: Linaro-open-discussions Digest, Vol 33, Issue 19
by Joyce Qi
Hi all,
Just reminder that we will have the Open Discussion on July 11th on the memory and RAS related topics.
@James, Lorenz,
Will you be able to join?
Thanks
Joyce
> 在 2023年6月28日，上午11:28，linaro-open-discussions-request@op-lists.linaro.org 写道：
>
> Send Linaro-open-discussions mailing list submissions to
> linaro-open-discussions(a)op-lists.linaro.org
>
> To subscribe or unsubscribe via email, send a message with subject or
> body 'help' to
> linaro-open-discussions-request(a)op-lists.linaro.org
>
> You can reach the person managing the list at
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>
> When replying, please edit your Subject line so it is more specific
> than "Re: Contents of Linaro-open-discussions digest..."
>
> Today's Topics:
>
> 1. Re: Li =?utf-8?Q?naro-open-discussions_call_on_May___24th
> (Joyce Qi)
>
>
> ----------------------------------------------------------------------
>
> Message: 1
> Date: Wed, 28 Jun 2023 11:28:44 +0800
> From: Joyce Qi <joyce.qi(a)linaro.org>
> Subject: [Linaro-open-discussions] Re: Li
> =?utf-8?Q?naro-open-discussions_call_on_May___24th
> To: Lorenzo Pieralisi <lorenzo.pieralisi(a)linaro.org>
> Cc: Kefeng Wang <wangkefeng.wang(a)huawei.com>, Yicong Yang
> <yangyicong(a)huawei.com>, yangyicong(a)hisilicon.com, James Morse
> <james.morse(a)arm.com>, "linaro-open-discussions(a)op-lists.linaro.org"
> <linaro-open-discussions(a)op-lists.linaro.org>, Tong Tiangen
> <tongtiangen(a)huawei.com>
> Message-ID: <7006CB51-7EF2-4561-96E0-1A8F28155284(a)linaro.org>
> Content-Type: text/plain; charset=gb2312
>
> Hi James，Leo,
>
> I noticed you join the LOD meeting yesterday.
> Sorry for the inconvenience, there is something wrong with my VPN and I can’t send out email and change the meeting successfully.
>
> I have reschedule the meeting to July 11th.
>
> Thanks:)
> Joyce
>
>
>> 在 2023年6月26日，下午4:51，Joyce Qi <joyce.qi(a)linaro.org> 写道：
>>
>>
>>
>>> 在 2023年6月26日，下午4:28，Lorenzo Pieralisi <lorenzo.pieralisi(a)linaro.org> 写道：
>>>
>>> On Tue, 20 Jun 2023 at 14:38, Joyce Qi <joyce.qi(a)linaro.org> wrote:
>>>>
>>>> Hi Lorenzo,
>>>>
>>>> Thanks so much for the update .
>>>>
>>>> Hi James,
>>>>
>>>> Do you have any update on the memory and RAS related topics?
>>>> Are you available the week during the first week of July?
>>>
>>> I suggest we set something up for second week of July to make sure
>>> we have enough time to organize it (eg July 11th).
>>
>> Ok, will move to July 11th.
>>
>>>
>>> Thanks,
>>> Lorenzo
>>>
>>>>
>>>>> 在 2023年6月20日，下午7:28，Lorenzo Pieralisi <lorenzo.pieralisi(a)linaro.org> 写道：
>>>>>
>>>>> On Wed, 24 May 2023 at 10:18, Lorenzo Pieralisi
>>>>> <lorenzo.pieralisi(a)linaro.org> wrote:
>>>>>>
>>>>>> On Mon, 22 May 2023 at 11:00, Kefeng Wang <wangkefeng.wang(a)huawei.com> wrote:
>>>>>>>
>>>>>>>
>>>>>>>
>>>>>>> On 2023/5/22 16:37, Yicong Yang wrote:
>>>>>>>> Hi Lorenzo,
>>>>>>>>
>>>>>>>> On 2023/5/22 16:14, Lorenzo Pieralisi wrote:
>>>>>>>>> On Mon, 22 May 2023 at 10:07, Joyce Qi <joyce.qi(a)linaro.org> wrote:
>>>>>>>>>>
>>>>>>>>>> Hi Yicong,
>>>>>>>>>>
>>>>>>>>>> Thanks for bring up these topics, yeah, our Open Discussion meeting is on May 23th.
>>>>>>>>>>
>>>>>>>>>> Hi James, Mike,
>>>>>>>>>>
>>>>>>>>>> Can you help involve Arm maintainers like Catalin,Mark,Will and the relative people in if you have?
>>>>>>>>>
>>>>>>>>> Is there anything controversial in those series or they are just
>>>>>>>>> following the normal
>>>>>>>>> review cycle on the mailing lists ? I don't think arm64 maintainers
>>>>>>>>> would be willing
>>>>>>>>> to join the discussions unless we are stuck on some specific issues
>>>>>>>>> that can't be
>>>>>>>>> resolved on mailing lists.
>>>>>>>>>
>>>>>>>>> Please let me know, thanks.
>>>>>>>>>
>>>>>>>>
>>>>>>>> For the batch TLB flush topic, it is previously discussed how to enable this by
>>>>>>>> a runtime tunnable to avoid potential impact on small systems with several cores.
>>>>>>>> Catalin proposal one method and I want to see if there's any other worries. But
>>>>>>>> for this I think it can be resolved on the mailing list.
>>>>>>>>
>>>>>>>> For the RAS topic,
>>>>>>>>
>>>>>>>> Hi Kefeng, more input?
>>>>>>>
>>>>>>> For the RAS patch, the biggest issue is that there is very few feedback
>>>>>>> from the maintainers :(
>>>>>>
>>>>>> I need some time to ask people to chime in, we can't expect this
>>>>>> to be organized with such a short notice.
>>>>>
>>>>> I realized that I am away next week, maybe we should aim at setting
>>>>> something up for the first week of July ? We are almost at v6.4 so
>>>>> reviews on the pending patches will have to wait till v6.5-rc1 anyway.
>>>>>
>>>>> Lorenzo
>>>>>
>>>>>>
>>>>>>>
>>>>>>> 1) ARM64 MC-Safe Copy,
>>>>>>> Mark Rutland give some advises in v4 and all are adressed, Catain give
>>>>>>> us some comments in v8 and all are fixed too in v9. This feature is
>>>>>>> pushed out one years ago( in 2022/4/16), so we want to make sure that
>>>>>>> could it be picked up for v6.4?
>>>>>>
>>>>>> v6.5 you mean. We can try to use these
>>>>>> discussions to facilitate the upstreaming
>>>>>> but again, this requires some time to prepare.
>>>>>>
>>>>>>> 2)Handle synchronous exceptions with proper si_code
>>>>>>> Both huawei and alibaba are trying to fix the commit
>>>>>>> 7f17b4a121d0 ("ACPI: APEI: Kick the memory_failure() queue for
>>>>>>> synchronous errors") which is from James Morse(glad to see James
>>>>>>> is Cced), but for now no respone from apei/arm.
>>>>>>>
>>>>>>> We want the two arm64 RAS enhancements to be accpeted, any comments
>>>>>>> and feedbacks from maintainer are appreciated
>>>>>>
>>>>>> Understood. See above.
>>>>>>
>>>>>> Thanks,
>>>>>> Lorenzo
>>>>>>
>>>>>>>
>>>>>>> Thanks.
>>>>>>>
>>>>>>>>
>>>>>>>>> Lorenzo
>>>>>>>>>>
>>>>>>>>>> Thanks:)
>>>>>>>>>> Joyce
>>>>>>>>>>
>>>>>>>>>>> 在 2023年5月22日，下午3:58，Yicong Yang <yangyicong(a)huawei.com> 写道：
>>>>>>>>>>>
>>>>>>>>>>> Hi Joyce, Jonathan,
>>>>>>>>>>>
>>>>>>>>>>> Do we plan an open-discussion for this month? If there is, we'd like to discuss 3 memory related topics which will benefit our platform:
>>>>>>>>>>>
>>>>>>>>>>> 1) the batched TLB flush support on arm64 to optimize the performance of unmapping and page migration on arm64
>>>>>>>>>>> https://lore.kernel.org/linux-mm/20230518065934.12877-1-yangyicong@huawei.c…
>>>>>>>>>>> 2) ARM64 RAS enhancement including below content. This is important for our product since we've met some real issues.
>>>>>>>>>>> a) ARM64 support Machine Check safe memory copy(ARCH_HAS_COPY_MC)
>>>>>>>>>>> https://lore.kernel.org/lkml/20221219120008.3818828-1-tongtiangen@huawei.co…
>>>>>>>>>>> b) Handle synchronous exceptions with proper si_code
>>>>>>>>>>> https://lore.kernel.org/lkml/20230408091359.31554-1-xueshuai@linux.alibaba.…
>>>>>>>>>>> https://lore.kernel.org/lkml/20221205160043.57465-1-xiexiuqi@huawei.com/
>>>>>>>>>>>
>>>>>>>>>>> We'd like to discuss the current status of these works, the solution and to see if there's any suggestions and worries.
>>>>>>>>>>>
>>>>>>>>>>> The topics involve memory and RAS related aspect so please feel free to drag anybody works in this area. We'd like to discuss
>>>>>>>>>>> this with related arm maintianers like Catalin, Mark, Will or others if possible.
>>>>>>>>>>>
>>>>>>>>>>> Thanks,
>>>>>>>>>>> Yicong
>>>>>>>>>>>
>>>>>>>>>>>
>>>>>>>>>>> On 2022/7/25 21:17, Joyce Qi wrote:
>>>>>>>>>>>> Hi Shamee，Lorenz，
>>>>>>>>>>>>
>>>>>>>>>>>> Thanks for the feedback，maybe we can postpone tomorrow’s LOD meeting？and welcome to bring up the topic we can arrange it accordingly.
>>>>>>>>>>>>
>>>>>>>>>>>> Thanks：）
>>>>>>>>>>>> Joyce
>>>>>>>>>>>>
>>>>>>>>>>>>
>>>>>>>>>>>>> 在 2022年7月25日，下午6:04，Shameerali Kolothum Thodi <shameerali.kolothum.thodi(a)huawei.com> 写道：
>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>>> -----Original Message-----
>>>>>>>>>>>>>> From: Lorenzo Pieralisi [mailto:lorenzo.pieralisi@gmail.com]
>>>>>>>>>>>>>> Sent: 25 July 2022 10:46
>>>>>>>>>>>>>> To: Joyce Qi <joyce.qi(a)linaro.org>
>>>>>>>>>>>>>> Cc: Jonathan Cameron <jonathan.cameron(a)huawei.com>; Shameerali
>>>>>>>>>>>>>> Kolothum Thodi <shameerali.kolothum.thodi(a)huawei.com>; Jonathon
>>>>>>>>>>>>>> Burcham <jon.burcham(a)linaro.org>; yangyicong
>>>>>>>>>>>>>> <yangyicong(a)huawei.com>; Hesham Almatary
>>>>>>>>>>>>>> <hesham.almatary(a)huawei.com>; shenyang (M)
>>>>>>>>>>>>>> <shenyang39(a)huawei.com>; tangchengchang
>>>>>>>>>>>>>> <tangchengchang(a)huawei.com>; Dietmar Eggemann
>>>>>>>>>>>>>> <Dietmar.Eggemann(a)arm.com>; linaro-open-discussions(a)op-lists.linaro.org;
>>>>>>>>>>>>>> Lorenzo Pieralisi <lorenzo.pieralisi(a)linaro.org>
>>>>>>>>>>>>>> Subject: Re: [Linaro-open-discussions] 回复：Re: 回复：Li
>>>>>>>>>>>>>> =?utf-8?Q?naro-open-discussions_call_on_May___24th
>>>>>>>>>>>>>>
>>>>>>>>>>>>>> On Thu, 21 Jul 2022 at 16:28, Joyce Qi <joyce.qi(a)linaro.org> wrote:
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> Hi Jonatha,Lorenz,Shamee,
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> Do you have any topics want to sync on July 26’s LOD meeting?
>>>>>>>>>>>>>>
>>>>>>>>>>>>>> [dropped my arm.com address and added @linaro.org one]
>>>>>>>>>>>>>>
>>>>>>>>>>>>>> I am just catching up after a 2 month hiatus but if there is anything urgent to
>>>>>>>>>>>>>> be discussed I am happy to join the call and run the meeting.
>>>>>>>>>>>>>
>>>>>>>>>>>>>
>>>>>>>>>>>>> Met too just back after holidays and don't have anything urgent for discussion
>>>>>>>>>>>>> from my end. Also, Jonathan is away this week.
>>>>>>>>>>>>>
>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>> Shameer
>>>>>>>>>>>>>
>>>>>>>>>>>>>> Lorenzo
>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>> Thanks:)
>>>>>>>>>>>>>>> Joyce
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> 在 2022年6月24日，下午10:38，Jonathan Cameron
>>>>>>>>>>>>>> <jonathan.cameron(a)huawei.com>
>>>>>>>>>>>>>>>> 写道：
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> My availability that week is going to be hard to predict (at a workshop in
>>>>>>>>>>>>>> Germany) but SPDM topic can wait.
>>>>>>>>>>>>>>>> I just wanted to confirm general interest and email works fine for that.
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> Good for others to have a sync meeting and if I can dial in for a bit I will
>>>>>>>>>>>>>> do so.
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> Jonathan
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> -----Original Message-----
>>>>>>>>>>>>>>>> From: Lorenzo Pieralisi <Lorenzo.Pieralisi(a)arm.com>
>>>>>>>>>>>>>>>> Sent: 24 June 2022 15:30
>>>>>>>>>>>>>>>> To: Joyce Qi <joyce.qi(a)linaro.org>
>>>>>>>>>>>>>>>> Cc: Shameerali Kolothum Thodi
>>>>>>>>>>>>>>>> <shameerali.kolothum.thodi(a)huawei.com>; Jonathan Cameron
>>>>>>>>>>>>>>>> <jonathan.cameron(a)huawei.com>; Lorenzo Pieralisi
>>>>>>>>>>>>>>>> <lpieralisi(a)kernel.org>; Jonathon Burcham <jon.burcham(a)linaro.org>;
>>>>>>>>>>>>>>>> yangyicong <yangyicong(a)huawei.com>; Hesham Almatary
>>>>>>>>>>>>>>>> <hesham.almatary(a)huawei.com>; shenyang (M)
>>>>>>>>>>>>>> <shenyang39(a)huawei.com>;
>>>>>>>>>>>>>>>> tangchengchang <tangchengchang(a)huawei.com>; Dietmar Eggemann
>>>>>>>>>>>>>>>> <Dietmar.Eggemann(a)arm.com>;
>>>>>>>>>>>>>>>> linaro-open-discussions(a)op-lists.linaro.org;
>>>>>>>>>>>>>>>> lorenzo.pieralisi(a)gmail.com
>>>>>>>>>>>>>>>> Subject: Re: [Linaro-open-discussions] 回复：Re: 回复：Li
>>>>>>>>>>>>>>>> =?utf-8?Q?naro-open-discussions_call_on_May___24th
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> Hi,
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> Moving to July 5th is fine by me.
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> For IORT RMR I'd encourage Shameer to ping the mailing list for SMMU
>>>>>>>>>>>>>> ACKs and not wait till July 5th, I believe I acked the relevant patches.
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> I CC'ed my personal email since the email address I am sending from will
>>>>>>>>>>>>>> stop working tonight.
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>> Lorenzo
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> ________________________________________
>>>>>>>>>>>>>>>> From: Joyce Qi <joyce.qi(a)linaro.org>
>>>>>>>>>>>>>>>> Sent: 24 June 2022 15:25
>>>>>>>>>>>>>>>> To: Lorenzo Pieralisi
>>>>>>>>>>>>>>>> Cc: Shameerali Kolothum Thodi; Jonathan Cameron; Lorenzo Pieralisi;
>>>>>>>>>>>>>>>> Jonathon Burcham; yangyicong; Hesham Almatary; shenyang (M);
>>>>>>>>>>>>>>>> tangchengchang; Dietmar Eggemann;
>>>>>>>>>>>>>>>> linaro-open-discussions(a)op-lists.linaro.org
>>>>>>>>>>>>>>>> Subject: Re: [Linaro-open-discussions] 回复：Re: 回复：Li
>>>>>>>>>>>>>>>> =?utf-8?Q?naro-open-discussions_call_on_May___24th
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> Hi Lorenzo，Jonathan，Shameerali，
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> Thanks for all your feedback，So can we move the LOD to July 5th for
>>>>>>>>>>>>>>>> the SPDM discussions？
>>>>>>>>>>>>>>>> If that’s ok，I can reschedule the LDO meeting.
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> Thanks:)
>>>>>>>>>>>>>>>> Joyce
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> 在 2022年6月24日，下午8:51，Lorenzo Pieralisi
>>>>>>>>>>>>>> <Lorenzo.Pieralisi(a)arm.com>
>>>>>>>>>>>>>>>>> 写道：
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> Hi,
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> I am traveling, I am interested on the SPDM discussions, I did not
>>>>>>>>>>>>>>>>> think there is much left to do wrt IORT RMR (other than merging it
>>>>>>>>>>>>>>>>> and decide who does that) but we can talk on thursday, just use
>>>>>>>>>>>>>>>>> lorenzo.pieralisi(a)gmail.com please to send the invite.
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> If we can talk week starting July 4th honestly it would even be
>>>>>>>>>>>>>>>>> better.
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>>> Lorenzo
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> ________________________________________
>>>>>>>>>>>>>>>>> From: joyce.qi--- via Linaro-open-discussions
>>>>>>>>>>>>>>>>> <linaro-open-discussions(a)op-lists.linaro.org>
>>>>>>>>>>>>>>>>> Sent: 24 June 2022 11:33
>>>>>>>>>>>>>>>>> To: Shameerali Kolothum Thodi; Jonathan Cameron; Lorenzo Pieralisi
>>>>>>>>>>>>>>>>> Cc: Jonathon Burcham; yangyicong; Hesham Almatary; shenyang (M);
>>>>>>>>>>>>>>>>> tangchengchang; Dietmar Eggemann;
>>>>>>>>>>>>>>>>> linaro-open-discussions(a)op-lists.linaro.org
>>>>>>>>>>>>>>>>> Subject: [Linaro-open-discussions] 回复：Re: 回复：Li
>>>>>>>>>>>>>>>>> =?utf-8?Q?naro-open-discussions_call_on_May___24th
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> Hi Jonanthan，Shameerali，
>>>>>>>>>>>>>>>>> Thanks a lot for your input here：）
>>>>>>>>>>>>>>>>> @Lorenzo，
>>>>>>>>>>>>>>>>> Are you available on next Thuesday’s LOD meeting for checking the
>>>>>>>>>>>>>>>>> status on IORT RMR series Shameerali has brought up？
>>>>>>>>>>>>>>>>> Thanks：）
>>>>>>>>>>>>>>>>> Joyce
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> -------- 原始邮件 --------
>>>>>>>>>>>>>>>>> 发件人： Shameerali Kolothum Thodi
>>>>>>>>>>>>>>>>> <shameerali.kolothum.thodi(a)huawei.com>
>>>>>>>>>>>>>>>>> 日期： 2022年6月24日周五 傍晚5:24
>>>>>>>>>>>>>>>>> 收件人： Jonathan Cameron <jonathan.cameron(a)huawei.com>,
>>>>>>>>>>>>>>>>> joyce.qi(a)linaro.org, Lorenzo Pieralisi <lpieralisi(a)kernel.org>
>>>>>>>>>>>>>>>>> 抄送： Jonathon Burcham <jon.burcham(a)linaro.org>, yangyicong
>>>>>>>>>>>>>>>>> <yangyicong(a)huawei.com>, Hesham Almatary
>>>>>>>>>>>>>>>>> <hesham.almatary(a)huawei.com>, "shenyang (M)"
>>>>>>>>>>>>>>>>> <shenyang39(a)huawei.com>, tangchengchang
>>>>>>>>>>>>>>>>> <tangchengchang(a)huawei.com>, Dietmar Eggemann
>>>>>>>>>>>>>>>>> <dietmar.eggemann(a)arm.com>,
>>>>>>>>>>>>>>>>> linaro-open-discussions(a)op-lists.linaro.org
>>>>>>>>>>>>>>>>> 主 题： RE: [Linaro-open-discussions] Re: 回复：Li
>>>>>>>>>>>>>>>>> =?utf-8?Q?naro-open-discussions_call_on_May___24th
>>>>>>>>>>>>>>>>>> -----Original Message-----
>>>>>>>>>>>>>>>>>> From: Jonathan Cameron via Linaro-open-discussions
>>>>>>>>>>>>>>>>>> [mailto:linaro-open-discussions@op-lists.linaro.org]
>>>>>>>>>>>>>>>>>> Sent: 24 June 2022 10:13
>>>>>>>>>>>>>>>>>> To: joyce.qi(a)linaro.org
>>>>>>>>>>>>>>>>>> Cc: Jonathan Cameron via Linaro-open-discussions
>>>>>>>>>>>>>>>>>> <linaro-open-discussions(a)op-lists.linaro.org>; Jonathon Burcham
>>>>>>>>>>>>>>>>>> <jon.burcham(a)linaro.org>; yangyicong <yangyicong(a)huawei.com>;
>>>>>>>>>>>>>>>>>> Hesham Almatary <hesham.almatary(a)huawei.com>; shenyang (M)
>>>>>>>>>>>>>>>>>> <shenyang39(a)huawei.com>; tangchengchang
>>>>>>>>>>>>>>>>>> <tangchengchang(a)huawei.com>; Dietmar Eggemann
>>>>>>>>>>>>>>>>>> <dietmar.eggemann(a)arm.com>
>>>>>>>>>>>>>>>>>> Subject: [Linaro-open-discussions] Re: 回复：Linaro-open-discussions
>>>>>>>>>>>>>>>>> call on
>>>>>>>>>>>>>>>>>> May 24th
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Hi Joyce,
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks for the reminder. I don’t think it is worth discussing at
>>>>>>>>>>>>>>>>> LOD as not
>>>>>>>>>>>>>>>>>> the right people on the call, but I would like to draw attention
>>>>>>>>>>>>>>>>>> to a
>>>>>>>>>>>>>>>>> thread
>>>>>>>>>>>>>>>>>> discussing whether to propose a SPDM BoF at Linux Plumbers:
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> https://lore.kernel.org/linux-cxl/20220609124702.000037b0@Huawei.c
>>>>>>>>>>>>>>>>>> om/
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> At the moment I plan to speculatively put in a proposal, but may
>>>>>>>>>>>>>>>>> withdraw it
>>>>>>>>>>>>>>>>>> if not enough people would be involved to make useful progress.
>>>>>>>>>>>>>>>>>> The big ‘discussion’ point is how much to do in kernel vs in
>>>>>>>>>>>>>>>>> Userspace.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> I’ve just polled some of my colleagues for any other topics they
>>>>>>>>>>>>>>>>> would like to
>>>>>>>>>>>>>>>>>> raise on LOD, but for now I don’t have anything ready to talk about.
>>>>>>>>>>>>>>>>> If Lorenzo is around, would like to check the status on IORT RMR
>>>>>>>>>>>>>>>>> series.
>>>>>>>>>>>>>>>>> I have sent out the v13 here,
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> https://lore.kernel.org/linux-acpi/20220615101044.1972-8-shameerali
>>>>>>>>>>>>>>>>> .kol
>>>>>>>>>>>>>>>>> othum.thodi(a)huawei.com/T/
>>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>>> Shameer
>>>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Jonathan
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> From: joyce.qi(a)linaro.org <joyce.qi(a)linaro.org>
>>>>>>>>>>>>>>>>>> Sent: 24 June 2022 10:06
>>>>>>>>>>>>>>>>>> To: Jonathan Cameron <jonathan.cameron(a)huawei.com>
>>>>>>>>>>>>>>>>>> Cc: Jonathan Cameron via Linaro-open-discussions
>>>>>>>>>>>>>>>>>> <linaro-open-discussions(a)op-lists.linaro.org>; Lorenzo Pieralisi
>>>>>>>>>>>>>>>>>> <lorenzo.pieralisi(a)arm.com>; Jonathon Burcham
>>>>>>>>>>>>>>>>> <jon.burcham(a)linaro.org>;
>>>>>>>>>>>>>>>>>> yangyicong <yangyicong(a)huawei.com>; Hesham Almatary
>>>>>>>>>>>>>>>>>> <hesham.almatary(a)huawei.com>; shenyang (M)
>>>>>>>>>>>>>>>>>> <shenyang39(a)huawei.com>; tangchengchang
>>>>>>>>>>>>>>>>>> <tangchengchang(a)huawei.com>; Dietmar Eggemann
>>>>>>>>>>>>>>>>>> <dietmar.eggemann(a)arm.com>
>>>>>>>>>>>>>>>>>> Subject: 回复：[Linaro-open-discussions] Linaro-open-discussions call
>>>>>>>>>>>>>>>>>> on May 24th
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Hi Jonanthan，all
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Do you have anything to sync during next week's LOD meeting?
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks
>>>>>>>>>>>>>>>>>> Joyce
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> -------- 原始邮件 --------
>>>>>>>>>>>>>>>>>> 发件人： Joyce Qi <joyce.qi(a)linaro.org<mailto:joyce.qi@linaro.org>>
>>>>>>>>>>>>>>>>>> 日期： 2022年5月24日周二 早上7:08
>>>>>>>>>>>>>>>>>> 收件人： Jonathan Cameron
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <jonathan.cameron(a)huawei.com<mailto:jonathan.cameron@huawei.com>>
>>>>>>>>>>>>>>>>>> 抄送： Jonathan Cameron via Linaro-open-discussions
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> <linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-dis
>>>>>>>>>>>>>>>>> cuss
>>>>>>>>>>>>>>>>> ions
>>>>>>>>>>>>>>>>>> @op-lists.linaro.org>>, Lorenzo Pieralisi
>>>>>>>>>>>>>>>>>> <lorenzo.pieralisi(a)arm.com<mailto:lorenzo.pieralisi@arm.com>>,
>>>>>>>>>>>>>>>>> Jonathon
>>>>>>>>>>>>>>>>>> Burcham <jon.burcham(a)linaro.org<mailto:jon.burcham@linaro.org>>,
>>>>>>>>>>>>>>>>>> yangyicong
>>>>>>>>>>>>>> <yangyicong(a)huawei.com<mailto:yangyicong@huawei.com>>,
>>>>>>>>>>>>>>>>>> Hesham Almatary
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <hesham.almatary(a)huawei.com<mailto:hesham.almatary@huawei.com>>,
>>>>>>>>>>>>>>>>>> "shenyang (M)"
>>>>>>>>>>>>>>>>>> <shenyang39(a)huawei.com<mailto:shenyang39@huawei.com>>,
>>>>>>>>>>>>>>>>>> tangchengchang
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <tangchengchang(a)huawei.com<mailto:tangchengchang@huawei.com>>,
>>>>>>>>>>>>>>>>>> Dietmar Eggemann
>>>>>>>>>>>>>>>>>> <dietmar.eggemann(a)arm.com<mailto:dietmar.eggemann@arm.com>>
>>>>>>>>>>>>>>>>>> 主 题： Re: [Linaro-open-discussions] Linaro-open-discussions call on
>>>>>>>>>>>>>>>>> May
>>>>>>>>>>>>>>>>>> 24th
>>>>>>>>>>>>>>>>>> Hi Jonathan,all
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks for the confirm.
>>>>>>>>>>>>>>>>>> I will cancel today’s meeting since no topic:)
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks:)
>>>>>>>>>>>>>>>>>> Joyce
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> 在 2022年5月20日，下午7:10，Jonathan Cameron
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <jonathan.cameron(a)huawei.com<mailto:jonathan.cameron@huawei.com>>
>>>>>>>>>>>>>>>>>> 写道：
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Hi Joyce,
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Nothing to discuss from me. Anyone else have anything they want
>>>>>>>>>>>>>>>>>> to
>>>>>>>>>>>>>>>>> bring
>>>>>>>>>>>>>>>>>> up?
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Jonathan
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> From: Joyce Qi <joyce.qi(a)linaro.org<mailto:joyce.qi@linaro.org>>
>>>>>>>>>>>>>>>>>> Sent: 18 May 2022 10:37
>>>>>>>>>>>>>>>>>> To: Jonathan Cameron
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <jonathan.cameron(a)huawei.com<mailto:jonathan.cameron@huawei.com>>
>>>>>>>>>>>>>>>>>> Cc: Jonathan Cameron via Linaro-open-discussions
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> <linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-dis
>>>>>>>>>>>>>>>>> cuss
>>>>>>>>>>>>>>>>> ions
>>>>>>>>>>>>>>>>>> @op-lists.linaro.org>>; Lorenzo Pieralisi
>>>>>>>>>>>>>>>>>> <lorenzo.pieralisi(a)arm.com<mailto:lorenzo.pieralisi@arm.com>>;
>>>>>>>>>>>>>>>>> Jonathon
>>>>>>>>>>>>>>>>>> Burcham <jon.burcham(a)linaro.org<mailto:jon.burcham@linaro.org>>;
>>>>>>>>>>>>>>>>>> yangyicong
>>>>>>>>>>>>>> <yangyicong(a)huawei.com<mailto:yangyicong@huawei.com>>;
>>>>>>>>>>>>>>>>>> Hesham Almatary
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <hesham.almatary(a)huawei.com<mailto:hesham.almatary@huawei.com>>;
>>>>>>>>>>>>>>>>>> shenyang (M)
>>>>>>>>>>>>>>>>>> <shenyang39(a)huawei.com<mailto:shenyang39@huawei.com>>;
>>>>>>>>>>>>>>>>>> tangchengchang
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <tangchengchang(a)huawei.com<mailto:tangchengchang@huawei.com>>;
>>>>>>>>>>>>>>>>>> Dietmar Eggemann
>>>>>>>>>>>>>>>>>> <dietmar.eggemann(a)arm.com<mailto:dietmar.eggemann@arm.com>>
>>>>>>>>>>>>>>>>>> Subject: Re: [Linaro-open-discussions] Linaro-open-discussions
>>>>>>>>>>>>>>>>>> call
>>>>>>>>>>>>>>>>> on May
>>>>>>>>>>>>>>>>>> 24th
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Hi Jonathan, Lorenz ,all,
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Do you have any topic to discuss during the Linaro open
>>>>>>>>>>>>>>>>>> discussions
>>>>>>>>>>>>>>>>> next
>>>>>>>>>>>>>>>>>> Tuesday?
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks:)
>>>>>>>>>>>>>>>>>> Joyce
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> 在 2022年4月26日，上午1:45，Jonathan Cameron
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <Jonathan.Cameron(a)huawei.com<mailto:Jonathan.Cameron@huawei.com>
>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> 写道：
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> On Fri, 22 Apr 2022 14:00:06 +0100 Jonathan Cameron via
>>>>>>>>>>>>>>>>>> Linaro-open-discussions
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> <linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-dis
>>>>>>>>>>>>>>>>> cuss
>>>>>>>>>>>>>>>>> ions
>>>>>>>>>>>>>>>>>> @op-lists.linaro.org>> wrote:
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> On Fri, 22 Apr 2022 11:33:29 +0100 Lorenzo Pieralisi
>>>>>>>>>>>>>>>>>> <lorenzo.pieralisi(a)arm.com<mailto:lorenzo.pieralisi@arm.com>>
>>>>>>>>>>>>>> wrote:
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> On Fri, Apr 22, 2022 at 10:36:43AM +0100, Jonathan Cameron wrote:
>>>>>>>>>>>>>>>>>> On Thu, 21 Apr 2022 21:32:01 +0800 Joyce Qi via
>>>>>>>>>>>>>>>>>> Linaro-open-discussions
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> <linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-dis
>>>>>>>>>>>>>>>>> cuss
>>>>>>>>>>>>>>>>> ions
>>>>>>>>>>>>>>>>>> @op-lists.linaro.org>> wrote:
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Hi Jonathon锟斤拷Lorenzo锟斤拷
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Do we have some topic to discuss for the Linaro-open-disscussions
>>>>>>>>>>>>>>>>> next
>>>>>>>>>>>>>>>>>> week?
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks:)
>>>>>>>>>>>>>>>>>> Joyce
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Hi Joyce,
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks for the reminder. So topics:
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> RMR: Nothing from our side
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> vCPUHP: we have a 'working' QEMU tree though it has some known
>>>>>>>>>>>>>>>>>> problems (doesn't work with SVE for some reason - so some
>>>>>>>>>>>>>>>>>> debugging
>>>>>>>>>>>>>>>>> to
>>>>>>>>>>>>>>>>>> do). Should be able to upload that shortly for anyone else who
>>>>>>>>>>>>>>>>>> wants to play with it. Any updates on progress of kernel patches
>>>>>>>>>>>>>>>>>> from ARM side would be good but email is fine for that.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Could not work on them, I need to figure out a plan and quickly,
>>>>>>>>>>>>>>>>>> we can talk about that though, I should be able to have a clearer
>>>>>>>>>>>>>>>>>> picture by Tuesday.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> I am still using your SPDM stack and there are a couple of things
>>>>>>>>>>>>>>>>>> I don't get (eg CHALLENGE_AUTH signature verification, RSA path,
>>>>>>>>>>>>>>>>>> spdm_asym_rsassa_3072 path in spdm_verify_signature() - just
>>>>>>>>>>>>>>>>>> wanted to ask if you tested this path, I am struggling with
>>>>>>>>>>>>>>>>>> signature verification - just wanted to ask in particular about
>>>>>>>>>>>>>>>>>> the need for
>>>>>>>>>>>>>>>>>> ASN.1 encoding to use verify_signature()).
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Tested this again and it seems to be working (tm)
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Here are the logs... Just in case you fancy hand decoding the
>>>>>>>>>>>>>>>>> exchange.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Sig should be the very last bit of the last message (ignoring the
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> pad IIRC)
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
>>>>>>>>>>>>>>>>>> 0c Platform Port Transmit Buffer: 01 00 01 00 03 00 00 00 10 84 00
>>>>>>>>>>>>>>>>>> 00 Platform Port Receive Command: 00 00 00 01 Platform Port
>>>>>>>>>>>>>>>>>> Receive
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 14
>>>>>>>>>>>>>>>>>> Platform Port Receive Buffer: 01 00 01 00 05 00 00 00 10 04 00 00
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 03 00
>>>>>>>>>>>>>>>>>> 10 00 11 00 12
>>>>>>>>>>>>>>>>>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
>>>>>>>>>>>>>>>>>> 0c Platform Port Transmit Buffer: 01 00 01 00 03 00 00 00 10 84 00
>>>>>>>>>>>>>>>>>> 00 Platform Port Receive Command: 00 00 00 01 Platform Port
>>>>>>>>>>>>>>>>>> Receive
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 14
>>>>>>>>>>>>>>>>>> Platform Port Receive Buffer: 01 00 01 00 05 00 00 00 10 04 00 00
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 03 00
>>>>>>>>>>>>>>>>>> 10 00 11 00 12
>>>>>>>>>>>>>>>>>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
>>>>>>>>>>>>>>>>>> 14 Platform Port Transmit Buffer: 01 00 01 00 05 00 00 00 11 e1
>>>>>>>>>>>>>>>>>> 00 00
>>>>>>>>>>>>>>>>> 00 02
>>>>>>>>>>>>>>>>>> 00 00 c6 f7 00 00
>>>>>>>>>>>>>>>>>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 14
>>>>>>>>>>>>>>>>>> Platform Port Receive Buffer: 01 00 01 00 05 00 00 00 11 61 00 00
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 00 00
>>>>>>>>>>>>>>>>>> 00 f7 fb 00 00
>>>>>>>>>>>>>>>>>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
>>>>>>>>>>>>>>>>>> 38 Platform Port Transmit Buffer: 01 00 01 00 0e 00 00 00 11 e3
>>>>>>>>>>>>>>>>>> 04 00
>>>>>>>>>>>>>>>>> 30 00
>>>>>>>>>>>>>>>>>> 01 00 94 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>>> 00 00 02 20 1b 00 03 20 06 00 04 20 94 00 05 20 01 00 Platform
>>>>>>>>>>>>>>>>>> Port Receive Command: 00 00 00 01 Platform Port Receive
>>>>>>>>>>>>>>>>>> TransportType: 00
>>>>>>>>>>>>>>>>>> 00 00 02 Platform Port Receive Size: 00 00 00 3c Platform Port
>>>>>>>>>>>>>>>>>> Receive Buffer: 01 00 01 00 0f 00 00 00 11 63 04 00 34
>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>>> 01 00 08 00 00 00 04 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>>> 00 00 00 00 00 00 02 20 10 00 03 20 02 00 04 20 04 00 05 20 01 00
>>>>>>>>>>>>>>>>>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
>>>>>>>>>>>>>>>>>> 0c Platform Port Transmit Buffer: 01 00 01 00 03 00 00 00 11 81 00
>>>>>>>>>>>>>>>>>> 00 Platform Port Receive Command: 00 00 00 01 Platform Port
>>>>>>>>>>>>>>>>>> Receive
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 9c
>>>>>>>>>>>>>>>>>> Platform Port Receive Buffer: 01 00 01 00 27 00 00 00 11 01 00 07
>>>>>>>>>>>>>>>>>> 6b
>>>>>>>>>>>>>>>>> 3e 6a
>>>>>>>>>>>>>>>>>> 85 12 30 ed ec 1e 27 0e 6e 96 b0 95 68 eb b0 1f 9a 7a 63 f6 bd 04
>>>>>>>>>>>>>>>>>> 0d
>>>>>>>>>>>>>>>>> 04 cc
>>>>>>>>>>>>>>>>>> 45 0a 03 b9 aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59 6b 3e
>>>>>>>>>>>>>>>>>> 6a
>>>>>>>>>>>>>>>>> 85 12
>>>>>>>>>>>>>>>>>> 30 ed ec 1e 27 0e 6e 96 b0 95 68 eb b0 1f 9a 7a 63 f6 bd 04 0d 04
>>>>>>>>>>>>>>>>>> cc
>>>>>>>>>>>>>>>>> 45 0a
>>>>>>>>>>>>>>>>>> 03 b9 aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59 6b 3e 6a 85
>>>>>>>>>>>>>>>>>> 12
>>>>>>>>>>>>>>>>> 30 ed
>>>>>>>>>>>>>>>>>> ec 1e 27 0e 6e 96 b0 95 68 eb b0 1f 9a 7a 63 f6 bd 04 0d 04 cc 45
>>>>>>>>>>>>>>>>>> 0a
>>>>>>>>>>>>>>>>> 03 b9
>>>>>>>>>>>>>>>>>> aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59 Platform Port
>>>>>>>>>>>>>>>>>> Transmit Command: 00 00 00 01 Platform Port Transmit TransportType:
>>>>>>>>>>>>>>>>>> 00 00 00 02 Platform Port Transmit Size: 00 00 00 10 Platform Port
>>>>>>>>>>>>>>>>>> Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00 00 00
>>>>>>>>>>>>>>>>> 00 00
>>>>>>>>>>>>>>>>>> 80
>>>>>>>>>>>>>>>>>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 04 10
>>>>>>>>>>>>>>>>>> Platform Port Receive Buffer: 01 00 01 00 04 01 00 00 11 02 00 00
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 04 64
>>>>>>>>>>>>>>>>>> 0a 64 0e 00 00 99 e0 d4 22 35 22 e5 ba 58 24 e7 1e eb cf 9a 2c b5
>>>>>>>>>>>>>>>>>> b5
>>>>>>>>>>>>>>>>> 71 10
>>>>>>>>>>>>>>>>>> ce aa 50 f5 64 83 78 d8 2d 9e 3b 99 53 74 db 98 d0 6f 63 cd 84 35
>>>>>>>>>>>>>>>>>> c5
>>>>>>>>>>>>>>>>> 10 cc
>>>>>>>>>>>>>>>>>> 21 f3 e0 30 82 05 19 30 82 03 01 a0 03 02 01 02 02 14 22 4d 06 18
>>>>>>>>>>>>>>>>>> d5
>>>>>>>>>>>>>>>>> d4
>>>>>>>>>>>>>>>>>> a8 45 bf 5d f5 56 06 47 3f 90 a9 20 21 27 30 0d 06 09 2a 86 48 86
>>>>>>>>>>>>>>>>>> f7
>>>>>>>>>>>>>>>>> 0d 01
>>>>>>>>>>>>>>>>>> 01 0c 05 00 30 1c 31 1a 30 18 06 03 55 04 03 0c 11 69 6e 74 65 6c
>>>>>>>>>>>>>>>>>> 20
>>>>>>>>>>>>>>>>> 74 65
>>>>>>>>>>>>>>>>>> 73 74 20 52 53 41 20 43 41 30 1e 17 0d 32 32 30 33 30 33 31 31 33
>>>>>>>>>>>>>>>>>> 38
>>>>>>>>>>>>>>>>> 34
>>>>>>>>>>>>>>>>>> 32 5a 17 0d 33 32 30 32 32 39 31 31 33 38 34 32 5a 30 1c 31 1a 30
>>>>>>>>>>>>>>>>>> 18
>>>>>>>>>>>>>>>>> 06
>>>>>>>>>>>>>>>>>> 03 55 04 03 0c 11 69 6e 74 65 6c 20 74 65 73 74 20 52 53 41 20 43
>>>>>>>>>>>>>>>>>> 41
>>>>>>>>>>>>>>>>> 30
>>>>>>>>>>>>>>>>>> 82 02 22 30 0d 06 09 2a 86 48 86 f7 0d 01 01 01 05 00 03 82 02 0f
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 30 82
>>>>>>>>>>>>>>>>>> 02 0a 02 82 02 01 00 b6 80 53 6e c7 66 9e 23 0f e9 2a d4 68 59 54
>>>>>>>>>>>>>>>>>> ec
>>>>>>>>>>>>>>>>> bc cd
>>>>>>>>>>>>>>>>>> dd 1d 37 52 f9 fb 48 ed 9b 8e e5 20 77 a0 57 26 ba a4 e4 44 95 9c
>>>>>>>>>>>>>>>>>> 13
>>>>>>>>>>>>>>>>> 30 36
>>>>>>>>>>>>>>>>>> b8 03 39 33 58 4f 0f 19 5f 28 21 ee 52 f4 b0 4c 7b c1 86 94 ed 12
>>>>>>>>>>>>>>>>>> cf
>>>>>>>>>>>>>>>>> 1b 24
>>>>>>>>>>>>>>>>>> d2 20 d8 6a 7b 33 86 3e 84 b8 0e 57 06 14 fb ff a5 a7 05 ca 75 0c
>>>>>>>>>>>>>>>>>> b2
>>>>>>>>>>>>>>>>> f0 d7
>>>>>>>>>>>>>>>>>> 58 d0 b5 92 de ff a5 82 54 90 35 60 f3 c8 8f 2f 16 5f 89 91 5b 42
>>>>>>>>>>>>>>>>>> 14
>>>>>>>>>>>>>>>>> 04 23
>>>>>>>>>>>>>>>>>> 44 04 54 2f 36 ab f7 29 91 9e 45 46 09 fc d9 45 29 a8 08 83 68 18
>>>>>>>>>>>>>>>>>> 58
>>>>>>>>>>>>>>>>> d3 7b
>>>>>>>>>>>>>>>>>> 9a b4 0e 3a b7 08 19 6f c2 7c 14 0f a3 3e fa ad 99 71 35 a5 fc ef
>>>>>>>>>>>>>>>>>> c1
>>>>>>>>>>>>>>>>> 31 93 ae
>>>>>>>>>>>>>>>>>> db a7 5c 67 e1 e7 ef 53 8b ab 3e 48 6d d1 78 86 84 41 43 97 4d af
>>>>>>>>>>>>>>>>>> d4
>>>>>>>>>>>>>>>>> 55 42
>>>>>>>>>>>>>>>>>> 4b 3c 8a 5e c9 bb 10 8a 6e 62 2d bc d6 29 de cf ae 2b f8 66 e0 a8
>>>>>>>>>>>>>>>>>> 0e
>>>>>>>>>>>>>>>>> 9a 86
>>>>>>>>>>>>>>>>>> e5 dd fc 85 ae 9c a9 28 a0 7d e8 93 7f cf 1b e2 7a d0 d4 c0 3c 92
>>>>>>>>>>>>>>>>>> 88
>>>>>>>>>>>>>>>>> 06 ba
>>>>>>>>>>>>>>>>>> 3a d3 18 3c a1 98 f2 95 3a b5 0c 98 57 97 06 22 91 a7 86 c9 87 a3
>>>>>>>>>>>>>>>>>> b1
>>>>>>>>>>>>>>>>> da 71
>>>>>>>>>>>>>>>>>> d6 14 79 a1 94 5b da fc d5 2e b3 4a 4f c2 8b 4a 99 44 4c da 3b 43
>>>>>>>>>>>>>>>>>> 1c
>>>>>>>>>>>>>>>>> 35 4d
>>>>>>>>>>>>>>>>>> e1 a7 18 b9 d8 be fb 49 5f a7 51 20 08 e7 43 2b 81 ae da 7f 67 82
>>>>>>>>>>>>>>>>>> 50
>>>>>>>>>>>>>>>>> a7 4d
>>>>>>>>>>>>>>>>>> 4a d2 65 04 57 5a 4a 74 66 da f3 58 9a cd 12 49 8e af 3b d8 ee 5c
>>>>>>>>>>>>>>>>>> 56
>>>>>>>>>>>>>>>>> 72 37
>>>>>>>>>>>>>>>>>> 2d 8d ca 57 10 d4 b5 cc 35 95 18 76 aa 20 dc 5f 45 b8 19 98 9f b7
>>>>>>>>>>>>>>>>>> 94
>>>>>>>>>>>>>>>>> 8f 05
>>>>>>>>>>>>>>>>>> 9e 3e f8 ee 51 7d 23 47 20 29 07 fa d4 d6 c2 28 4a 79 6a b3 3b ec
>>>>>>>>>>>>>>>>>> c3
>>>>>>>>>>>>>>>>> 64 ee
>>>>>>>>>>>>>>>>>> 78 4c d2 72 95 74 5b 8c 90 25 d4 11 68 89 fe bc 8e e4 a3 fa d6 b4
>>>>>>>>>>>>>>>>>> 6c
>>>>>>>>>>>>>>>>> 46 63
>>>>>>>>>>>>>>>>>> 31 99 25 06 5a 30 85 4a 0e 22 38 b7 33 07 65 11 1b 12 88 0b 71 37
>>>>>>>>>>>>>>>>>> 20
>>>>>>>>>>>>>>>>> 2b
>>>>>>>>>>>>>>>>>> 54 00 43 30 24 e9 22 98 1b 6d 6c da 98 02 8d 36 6b 08 1f 03 90 e4
>>>>>>>>>>>>>>>>>> bb
>>>>>>>>>>>>>>>>> dc 0b
>>>>>>>>>>>>>>>>>> c4 3d b0 00 93 ab d9 11 6f da 04 32 48 3c 61 d0 d6 7b 5d 72 f8 3c
>>>>>>>>>>>>>>>>>> 85
>>>>>>>>>>>>>>>>> 65 9f
>>>>>>>>>>>>>>>>>> b6 c0 5f 0d a7 1e d6 ad d8 0a a1 70 1f b8 3a f8 8b 4b 99 02 03 01
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 01 a3
>>>>>>>>>>>>>>>>>> 53 30 51 30 1d 06 03 55 1d 0e 04 16 04 14 b3 c1 9a d7 32 bf 99 6b
>>>>>>>>>>>>>>>>>> 9f
>>>>>>>>>>>>>>>>> 77 8a
>>>>>>>>>>>>>>>>>> 11 f4 fc 24 92 43 f7 f7 ec 30 1f 06 03 55 1d 23 04 18 30 16 80 14
>>>>>>>>>>>>>>>>>> b3
>>>>>>>>>>>>>>>>> c1 9a
>>>>>>>>>>>>>>>>>> d7 32 bf 99 6b 9f 77 8a 11 f4 fc 24 92 43 f7 f7 ec 30 0f 06 03 55
>>>>>>>>>>>>>>>>>> 1d
>>>>>>>>>>>>>>>>> 13 01 01
>>>>>>>>>>>>>>>>>> ff 04 05 30 03 01 01 ff 30 0d 06 09 2a 86 48 86 f7 0d 01 01 0c 05
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 03 82
>>>>>>>>>>>>>>>>>> 02 01 00 72 e2 8c aa 49 24 3f e9 53 a6 15 6d a0 da ed b8 ac d7 9b
>>>>>>>>>>>>>>>>>> fd
>>>>>>>>>>>>>>>>> 9b 19
>>>>>>>>>>>>>>>>>> e3 e1 b4 27 36 79 24 63 03 0b f5 55 6c 22 cc 81 a7 1f 8c 90 d1 3e
>>>>>>>>>>>>>>>>>> f8
>>>>>>>>>>>>>>>>> cd f1
>>>>>>>>>>>>>>>>>> 79 8a ae 1f 4c aa 2b 6a 1b a5 4d cf fe 71 44 96 f6 f1 c6 d7 6d 38
>>>>>>>>>>>>>>>>>> a5
>>>>>>>>>>>>>>>>> fd 95 49
>>>>>>>>>>>>>>>>>> fb cb 0f c9 c6 6a 5f d1 85 ff ba e5 cb ef f8 43 de 7e ac 92 2c b3
>>>>>>>>>>>>>>>>>> 2c
>>>>>>>>>>>>>>>>> 57 a6 39
>>>>>>>>>>>>>>>>>> f8 d2 ae c4 06 e8 3d 35 01 e7 30 51 74 e2 28 a2 6f 10 69 3d d8 96
>>>>>>>>>>>>>>>>>> d8
>>>>>>>>>>>>>>>>> 61 f5
>>>>>>>>>>>>>>>>>> ff d3 29 86 26 e2 57 23 dc 8d 77 1a 31 f0 6f df a7 50 34 28 4a e3
>>>>>>>>>>>>>>>>>> de
>>>>>>>>>>>>>>>>> 55 d0
>>>>>>>>>>>>>>>>>> a2 6f 8a db a1 54 7a ac 9f d3 e8 c5 1f 55 2c 2e fc 37 c9 4c a1 22
>>>>>>>>>>>>>>>>>> a4
>>>>>>>>>>>>>>>>> e4 20 77
>>>>>>>>>>>>>>>>>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
>>>>>>>>>>>>>>>>>> 10 Platform Port Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00
>>>>>>>>>>>>>>>>>> 00 00
>>>>>>>>>>>>>>>>> 04 64
>>>>>>>>>>>>>>>>>> 0a
>>>>>>>>>>>>>>>>>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 04 10
>>>>>>>>>>>>>>>>>> Platform Port Receive Buffer: 01 00 01 00 04 01 00 00 11 02 00 00
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 04 64
>>>>>>>>>>>>>>>>>> 06 84 86 e0 3e 11 8b 72 c3 92 16 95 d5 32 0f 81 3d d1 0e d0 f8 3a
>>>>>>>>>>>>>>>>>> e6
>>>>>>>>>>>>>>>>> 20 fe
>>>>>>>>>>>>>>>>>> d8 ae 5a c1 27 2c 18 1f 60 40 fa 89 10 05 33 f7 35 9d 5c 35 29 0d
>>>>>>>>>>>>>>>>>> b3
>>>>>>>>>>>>>>>>> 26 94
>>>>>>>>>>>>>>>>>> 48 eb 75 a3 d5 a8 74 22 80 56 40 cc 74 60 c1 03 d5 32 5d 3d 24 4c
>>>>>>>>>>>>>>>>>> b3
>>>>>>>>>>>>>>>>> 5e b2
>>>>>>>>>>>>>>>>>> f5 5b 61 f1 d7 fa 40 71 45 af 67 c5 fc 5a ee 32 10 5f eb 6c 68 be
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> e1 0a e9
>>>>>>>>>>>>>>>>>> 23 0d 06 6d fb b8 af 3a 9a 33 d1 b0 eb 89 5f c9 26 ba b8 91 ab cd
>>>>>>>>>>>>>>>>>> 55
>>>>>>>>>>>>>>>>> 90 24
>>>>>>>>>>>>>>>>>> 22 1b 3b 15 11 fe 61 22 de ae d7 19 45 b1 bf 09 09 2f c7 8f 57 b1
>>>>>>>>>>>>>>>>>> 2b
>>>>>>>>>>>>>>>>> 37 b5
>>>>>>>>>>>>>>>>>> 9d 4d f2 8b 2d ea 29 f5 17 bb 11 2f 5b 59 1b 43 65 d1 60 15 b9 ba
>>>>>>>>>>>>>>>>>> ca
>>>>>>>>>>>>>>>>> 0b a4
>>>>>>>>>>>>>>>>>> bd 25 ec ba 5d 55 45 ab 02 2d fb 16 3e d6 82 01 a7 62 1a c7 77 77
>>>>>>>>>>>>>>>>>> da
>>>>>>>>>>>>>>>>> 5f 4d
>>>>>>>>>>>>>>>>>> f2 a2 f5 14 24 e8 ab 63 16 a4 5d f0 ec 5e 1c 9a 72 a2 86 dd 2b ba
>>>>>>>>>>>>>>>>>> 88
>>>>>>>>>>>>>>>>> d5 98
>>>>>>>>>>>>>>>>>> 56 c7 1c 63 2e 59 eb 4a a7 df 55 7e 0c 77 ae de 9b 88 e2 93 47 27
>>>>>>>>>>>>>>>>>> 62
>>>>>>>>>>>>>>>>> c7 d4
>>>>>>>>>>>>>>>>>> 0e 5d a4 16 05 ca 78 bd b9 67 d9 e7 c1 c8 41 23 94 de ae 5f e7 b6
>>>>>>>>>>>>>>>>>> 50
>>>>>>>>>>>>>>>>> 76 d5
>>>>>>>>>>>>>>>>>> 4d d5 ce d6 b5 d4 78 53 c0 18 6d 7f c5 f0 34 29 ba 9a 14 ba f2 13
>>>>>>>>>>>>>>>>>> 07
>>>>>>>>>>>>>>>>> 4a 0f
>>>>>>>>>>>>>>>>>> e9 bd 1b fa 4e 20 4c 73 5e eb 9a 6d 3c bb 3b 61 e7 bf 71 cc c0 7a
>>>>>>>>>>>>>>>>>> d2
>>>>>>>>>>>>>>>>> bf a7
>>>>>>>>>>>>>>>>>> 26 b9 9a bc 2d a0 22 18 12 1d 04 87 30 82 04 a0 30 82 02 88 a0 03
>>>>>>>>>>>>>>>>>> 02
>>>>>>>>>>>>>>>>> 01
>>>>>>>>>>>>>>>>>> 02 02 01 01 30 0d 06 09 2a 86 48 86 f7 0d 01 01 0c 05 00 30 1c 31
>>>>>>>>>>>>>>>>>> 1a
>>>>>>>>>>>>>>>>> 30 18
>>>>>>>>>>>>>>>>>> 06 03 55 04 03 0c 11 69 6e 74 65 6c 20 74 65 73 74 20 52 53 41 20
>>>>>>>>>>>>>>>>>> 43
>>>>>>>>>>>>>>>>> 41
>>>>>>>>>>>>>>>>>> 30 1e 17 0d 32 32 30 33 30 33 31 31 34 30 30 33 5a 17 0d 33 32 30
>>>>>>>>>>>>>>>>>> 32
>>>>>>>>>>>>>>>>> 32
>>>>>>>>>>>>>>>>>> 39 31 31 34 30 30 33 5a 30 2b 31 29 30 27 06 03 55 04 03 0c 20 69
>>>>>>>>>>>>>>>>>> 6e
>>>>>>>>>>>>>>>>> 74
>>>>>>>>>>>>>>>>>> 65 6c 20 74 65 73 74 20 52 53 41 20 69 6e 74 65 72 6d 65 64 69 61
>>>>>>>>>>>>>>>>>> 74
>>>>>>>>>>>>>>>>> 65
>>>>>>>>>>>>>>>>>> 20 63 65 72 74 30 82 01 a2 30 0d 06 09 2a 86 48 86 f7 0d 01 01 01
>>>>>>>>>>>>>>>>>> 05
>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>>> 03 82 01 8f 00 30 82 01 8a 02 82 01 81 00 ab 97 02 85 a7 a4 8c 17
>>>>>>>>>>>>>>>>>> 29
>>>>>>>>>>>>>>>>> 31 0c
>>>>>>>>>>>>>>>>>> b2 0d f6 e4 3d 76 00 ce e1 1b 19 9b e9 84 f5 36 10 1f d5 e6 60 fe
>>>>>>>>>>>>>>>>>> 8a
>>>>>>>>>>>>>>>>> e4 0a
>>>>>>>>>>>>>>>>>> 53 63 23 7c f8 57 8d 7f 2b a8 10 78 dd 40 ef a8 65 33 47 a4 fc b6
>>>>>>>>>>>>>>>>>> f8
>>>>>>>>>>>>>>>>> 23 b3
>>>>>>>>>>>>>>>>>> 4b 28 8e c8 98 29 02 55 93 54 35 5d 2c fd d8 a4 5d 02 bb c5 06 61
>>>>>>>>>>>>>>>>>> 72
>>>>>>>>>>>>>>>>> cb 77
>>>>>>>>>>>>>>>>>> a1 f6 ed 83 68 ec 4f a7 17 4b 29 89 52 40 9a f3 09 20 1e 4d e1 98
>>>>>>>>>>>>>>>>>> 37
>>>>>>>>>>>>>>>>> 70 de
>>>>>>>>>>>>>>>>>> 7c b9 77 2a 77 3d 41 e3 09 e4 d2 57 87 4b de 19 b9 c7 74 bc ec ac
>>>>>>>>>>>>>>>>>> 98
>>>>>>>>>>>>>>>>> b0 0e
>>>>>>>>>>>>>>>>>> 2e 36 1e f7 8d 05 ab d4 a2 2b 0b fc a3 61 8d 08 bb ce 74 0a a1 d4
>>>>>>>>>>>>>>>>>> b6
>>>>>>>>>>>>>>>>> 38 80
>>>>>>>>>>>>>>>>>> ab a8 be f3 d1 5d 5f 6e cd c7 4b af 85 2f a5 e1 5e 74 0c c8 be a2
>>>>>>>>>>>>>>>>>> 67
>>>>>>>>>>>>>>>>> 98 c7
>>>>>>>>>>>>>>>>>> 61 45 d7 2a ee 88 93 4f d5 ef 83 11 dc 37 a0 38 20 97 c9 24 c3 3a
>>>>>>>>>>>>>>>>>> 26
>>>>>>>>>>>>>>>>> 69 90
>>>>>>>>>>>>>>>>>> 1e da 97 87 51 55 33 ef bc 13 b8 68 e8 da e0 68 53 90 11 03 83 43
>>>>>>>>>>>>>>>>>> 85
>>>>>>>>>>>>>>>>> f6 69
>>>>>>>>>>>>>>>>>> 7c d7 07 d4 51 72 94 f5 44 02 7c cb bf 2e f0 1c d7 5b ac ab a7 ac
>>>>>>>>>>>>>>>>>> 35
>>>>>>>>>>>>>>>>> b7 f4
>>>>>>>>>>>>>>>>>> 19 cc 78 86 b6 ac 38 17 b3 37 09 5d b5 3f 65 e1 a8 7e 7b 42 0d cb
>>>>>>>>>>>>>>>>>> 24
>>>>>>>>>>>>>>>>> e9 3d
>>>>>>>>>>>>>>>>>> fc d8 06 2e bc b3 1b 1c 2f 26 cf d2 24 f4 f7 7b 22 fd f1 6a 4e a9
>>>>>>>>>>>>>>>>>> 73
>>>>>>>>>>>>>>>>> 0a ea c5
>>>>>>>>>>>>>>>>>> 11 b9 d3 07 57 f6 b7 d4 df 66 2a 84 7b ec 0b 77 93 69 d6 06 e1 96
>>>>>>>>>>>>>>>>>> 97
>>>>>>>>>>>>>>>>> 4c 7e
>>>>>>>>>>>>>>>>>> 72 51 be a4 d1 d6 41 33 d8 69 41 f8 3f 57 44 48 82 ad 34 26 e1 2f
>>>>>>>>>>>>>>>>>> f6
>>>>>>>>>>>>>>>>> d4 fd
>>>>>>>>>>>>>>>>>> dd 6f a7 e1 55 69 5c 64 a6 a2 a1 70 aa 6f dd a0 cb 3c 9f ce 87 13
>>>>>>>>>>>>>>>>>> 02
>>>>>>>>>>>>>>>>> 03 01
>>>>>>>>>>>>>>>>>> 00 01 a3 5e 30 5c 30 0c 06 03 55 1d 13 04 05 30 03 01 01 ff 30 0b
>>>>>>>>>>>>>>>>>> 06
>>>>>>>>>>>>>>>>> 03 55
>>>>>>>>>>>>>>>>>> 1d 0f 04 04 03 02 01 fe 30 1d 06 03 55 1d 0e 04 16 04 14 c1 3f 34
>>>>>>>>>>>>>>>>>> 2e
>>>>>>>>>>>>>>>>> d9 40
>>>>>>>>>>>>>>>>>> de 6a 8d b4 45 ed 8a a0 6b b6 73 03 2b e5 30 20 06 03 55 1d 25 01
>>>>>>>>>>>>>>>>>> 01
>>>>>>>>>>>>>>>>> ff 04
>>>>>>>>>>>>>>>>>> 16 30 14 06 08 2b 06 01 05 05 07 03 01 06 08 2b 06 01 05 05 07 03
>>>>>>>>>>>>>>>>>> 02
>>>>>>>>>>>>>>>>> 30
>>>>>>>>>>>>>>>>>> 0d 06 09 2a 86 48 86 f7 0d 01 01 0c 05 00 03 82 02 01 00 7d 96 9d
>>>>>>>>>>>>>>>>>> 42
>>>>>>>>>>>>>>>>> 20 f4
>>>>>>>>>>>>>>>>>> 5c 80 19 d9 31
>>>>>>>>>>>>>>>>>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
>>>>>>>>>>>>>>>>>> 10 Platform Port Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00
>>>>>>>>>>>>>>>>>> 00 00
>>>>>>>>>>>>>>>>> 08 64
>>>>>>>>>>>>>>>>>> 06
>>>>>>>>>>>>>>>>>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 04 10
>>>>>>>>>>>>>>>>>> Platform Port Receive Buffer: 01 00 01 00 04 01 00 00 11 02 00 00
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 04 64
>>>>>>>>>>>>>>>>>> 02 d9 f4 22 2b c9 ea 52 0f 3e a8 e1 fb 87 b9 28 8a c6 70 32 5f a5
>>>>>>>>>>>>>>>>>> 4e
>>>>>>>>>>>>>>>>> a9 a2
>>>>>>>>>>>>>>>>>> 22 ed 38 36 69 38 20 07 81 f2 b0 80 b6 05 5f b3 26 8b 60 08 ac fa
>>>>>>>>>>>>>>>>>> db
>>>>>>>>>>>>>>>>> 78 08
>>>>>>>>>>>>>>>>>> 20 c7 c5 3c 70 85 b8 e3 3c 81 45 3e 2b d9 6f e9 bf bf b9 d7 59 bd
>>>>>>>>>>>>>>>>>> 80
>>>>>>>>>>>>>>>>> 46 87
>>>>>>>>>>>>>>>>>> 08 f8 72 1e 44 b6 c4 17 2e 0e fe 51 28 d3 a5 d4 18 7e b6 64 ba 45
>>>>>>>>>>>>>>>>>> 4f
>>>>>>>>>>>>>>>>> bc 51
>>>>>>>>>>>>>>>>>> dd 38 70 e7 1f 0f 07 4d 75 b5 3e 2c 95 ca 11 0b a7 12 0f 25 8d ed
>>>>>>>>>>>>>>>>>> 0a
>>>>>>>>>>>>>>>>> 4b 6f
>>>>>>>>>>>>>>>>>> 96 e2 14 22 2d f7 96 64 6a c9 3a eb 09 71 89 ae 8d 82 2e 31 d6 46
>>>>>>>>>>>>>>>>>> 58
>>>>>>>>>>>>>>>>> 6c 85
>>>>>>>>>>>>>>>>>> 3b dc 14 1f c3 5c b3 02 fe ef 26 f1 8a d3 70 50 88 45 bd c8 f7 57
>>>>>>>>>>>>>>>>>> 24
>>>>>>>>>>>>>>>>> 1b ef 01
>>>>>>>>>>>>>>>>>> 8b 84 42 30 bb 1b 51 f4 e5 c2 02 6f ae 42 1d 4c a8 08 b2 75 c8 9b
>>>>>>>>>>>>>>>>>> 6c
>>>>>>>>>>>>>>>>> 6f 75
>>>>>>>>>>>>>>>>>> e9 97 4a b3 f3 17 54 90 3b 1d c1 c7 e7 08 8a 88 5f 42 67 b5 04 4d
>>>>>>>>>>>>>>>>>> 4f
>>>>>>>>>>>>>>>>> b8 b9
>>>>>>>>>>>>>>>>>> 5f 60 69 3a 1b 6a ee 39 3d 72 09 c4 80 5e 89 15 12 87 39 68 63 7c
>>>>>>>>>>>>>>>>>> 65
>>>>>>>>>>>>>>>>> ed b4
>>>>>>>>>>>>>>>>>> f1 12 d9 b9 82 30 74 0b aa 40 14 e0 33 f7 98 af 31 db e8 81 62 92
>>>>>>>>>>>>>>>>>> e6
>>>>>>>>>>>>>>>>> fc 9b
>>>>>>>>>>>>>>>>>> 6b 88 f9 cc c1 e4 6f 95 d2 86 f2 34 8f 48 c7 37 45 8e 25 07 26 f7
>>>>>>>>>>>>>>>>>> 18
>>>>>>>>>>>>>>>>> 75 04
>>>>>>>>>>>>>>>>>> 12 e6 16 6f 50 09 26 c9 8e 36 3e 41 6d 90 d0 31 13 e9 47 3c c9 c4
>>>>>>>>>>>>>>>>>> f3
>>>>>>>>>>>>>>>>> c1 b0
>>>>>>>>>>>>>>>>>> 1c 20 1c c8 95 4d 18 8d 46 83 35 fa 95 03 36 88 68 55 df a3 8d 79
>>>>>>>>>>>>>>>>>> 9b
>>>>>>>>>>>>>>>>> eb 16
>>>>>>>>>>>>>>>>>> bf 88 38 10 db 8c c2 f1 20 1b 36 a7 3b 44 26 bd c1 29 7f 02 98 a7
>>>>>>>>>>>>>>>>>> 31
>>>>>>>>>>>>>>>>> aa cd
>>>>>>>>>>>>>>>>>> 60 c7 ee 15 a4 b2 be 66 07 47 ea 89 95 5f 32 c6 bf 2e b5 66 46 5a
>>>>>>>>>>>>>>>>>> e1
>>>>>>>>>>>>>>>>> 79 f2
>>>>>>>>>>>>>>>>>> cd 4a 39 e0 9d f1 74 2f 00 6b e4 60 20 88 f0 53 83 26 6d ee ac a6
>>>>>>>>>>>>>>>>>> f6
>>>>>>>>>>>>>>>>> 54 47
>>>>>>>>>>>>>>>>>> e2 7a 58 a6 29 1d c7 50 a9 91 0c 68 ff fd 7b 25 a2 f3 34 b2 15 bd
>>>>>>>>>>>>>>>>>> f4
>>>>>>>>>>>>>>>>> 7d cf 9e
>>>>>>>>>>>>>>>>>> f1 4c 0d 86 39 b2 3e 80 e9 94 15 55 c8 af 8c d2 a9 6e 61 ce e5 23
>>>>>>>>>>>>>>>>>> 22
>>>>>>>>>>>>>>>>> dc 4e
>>>>>>>>>>>>>>>>>> b8 1c 41 68 7a b2 30 23 1c f2 6e 22 2e bd cc 6a 99 0b 1b eb 58 05
>>>>>>>>>>>>>>>>>> 1c
>>>>>>>>>>>>>>>>> 04 c3
>>>>>>>>>>>>>>>>>> 30 82 04 6b 30 82 02 d3 a0 03 02 01 02 02 01 03 30 0d 06 09 2a 86
>>>>>>>>>>>>>>>>>> 48
>>>>>>>>>>>>>>>>> 86
>>>>>>>>>>>>>>>>>> f7 0d 01 01 0c 05 00 30 2b 31 29 30 27 06 03 55 04 03 0c 20 69 6e
>>>>>>>>>>>>>>>>>> 74
>>>>>>>>>>>>>>>>> 65 6c
>>>>>>>>>>>>>>>>>> 20 74 65 73 74 20 52 53 41 20 69 6e 74 65 72 6d 65 64 69 61 74 65
>>>>>>>>>>>>>>>>>> 20
>>>>>>>>>>>>>>>>> 63
>>>>>>>>>>>>>>>>>> 65 72 74 30 1e 17 0d 32 32 30 33 30 33 31 31 34 30 32 34 5a 17 0d
>>>>>>>>>>>>>>>>>> 33
>>>>>>>>>>>>>>>>> 32
>>>>>>>>>>>>>>>>>> 30 32 32 39 31 31 34 30 32 34 5a 30 28 31 26 30 24 06 03 55 04 03
>>>>>>>>>>>>>>>>>> 0c
>>>>>>>>>>>>>>>>> 1d
>>>>>>>>>>>>>>>>>> 69 6e 74 65 6c 20 74 65 73 74 20 52 53 41 20 72 65 73 70 6f 6e 64
>>>>>>>>>>>>>>>>>> 65
>>>>>>>>>>>>>>>>> 72 20
>>>>>>>>>>>>>>>>>> 63 65 72 74 30 82 01 a2 30 0d 06 09 2a 86 48 86 f7 0d 01 01 01 05
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 03
>>>>>>>>>>>>>>>>>> 82 01 8f 00 30 82 01 8a 02 82 01 81 00 a3 d7 6e f3 b7 4f 50 46 6c
>>>>>>>>>>>>>>>>>> 67
>>>>>>>>>>>>>>>>> 7f 61
>>>>>>>>>>>>>>>>>> 1a 30 85 a7 5a 8d b9 1f 29 76 86 57 5c cd 5c 20 fe b3 74 59 20 69
>>>>>>>>>>>>>>>>>> 5e
>>>>>>>>>>>>>>>>> 8f de
>>>>>>>>>>>>>>>>>> 22 cb a8 e9 f0 fb 3a 1a 45 be ef 50 46 b3 fc fe 74 ea e5 9d 0e 8d
>>>>>>>>>>>>>>>>>> 3e
>>>>>>>>>>>>>>>>> b8 13 a5
>>>>>>>>>>>>>>>>>> d2 7b 67 49 f6 6b 2d 7c 97 64 d1 24 ae c4 25 3f bf 67 9a 27 5d 72
>>>>>>>>>>>>>>>>>> df
>>>>>>>>>>>>>>>>> 23 87
>>>>>>>>>>>>>>>>>> d9 53 ba 8d de a7 3d cd e4 1c 9f 66 50 f4 e0 b7 96 97 36 2b 1a f6
>>>>>>>>>>>>>>>>>> 38
>>>>>>>>>>>>>>>>> d8 7e
>>>>>>>>>>>>>>>>>> 0e c4 70 bc 7c 00 4a 74 89 9b 62 a5 82 d9 6a 69 b7 23 aa 74 9e ef
>>>>>>>>>>>>>>>>>> 7c
>>>>>>>>>>>>>>>>> b9 59
>>>>>>>>>>>>>>>>>> 12 4c 8f 4e a2 42 5c d1 32 54 39 ea ca 64 e0 33 50 6c df f5 12 8e
>>>>>>>>>>>>>>>>>> 1c
>>>>>>>>>>>>>>>>> 3d 51
>>>>>>>>>>>>>>>>>> fe da b8 57 6e 7b 42 2d b6 ec 21 92 af 08 f2 89 c8 19 a4 d5 32 56
>>>>>>>>>>>>>>>>>> 62
>>>>>>>>>>>>>>>>> c2 a3
>>>>>>>>>>>>>>>>>> f5 cc ec d4 eb 07 74 28 a5 5c 0b 1c 7a 4e 03 3a d5 c8 4e 39 25 4a
>>>>>>>>>>>>>>>>>> 9b
>>>>>>>>>>>>>>>>> ce 9a
>>>>>>>>>>>>>>>>>> 63 1a 15 2c 98 4b 64 04 2c 9b 7d 92 32 36 33 60 8b ec 2c a8 5d 95
>>>>>>>>>>>>>>>>>> 74
>>>>>>>>>>>>>>>>> 06 3f
>>>>>>>>>>>>>>>>>> 83 cb 62 12 84 b8 dd 68 eb 1c 18 6b 84 cc b6 ef 4f a8 3b e1 0f 0a
>>>>>>>>>>>>>>>>>> 09
>>>>>>>>>>>>>>>>> 46 c6
>>>>>>>>>>>>>>>>>> 0f fe 24 55 8c 85 a1 3d 37 b1 ff 29 55 5b 23 f1 91 df cc 9d 38 48
>>>>>>>>>>>>>>>>>> 72
>>>>>>>>>>>>>>>>> 0a 55
>>>>>>>>>>>>>>>>>> b7 45 42 25 c3 05 67 b4 bc 17 cd fd a3 7b 1c e4 d8 b1 8b 42 b2 47
>>>>>>>>>>>>>>>>>> 1b
>>>>>>>>>>>>>>>>> b7 99
>>>>>>>>>>>>>>>>>> 4d 8a fd fe 52 80 94 58 e0 81 37 9a 91 61 93 e4 49 5e 69 16 32 4c
>>>>>>>>>>>>>>>>>> 03
>>>>>>>>>>>>>>>>> 7c 42
>>>>>>>>>>>>>>>>>> 2e d1
>>>>>>>>>>>>>>>>>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
>>>>>>>>>>>>>>>>>> 10 Platform Port Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00
>>>>>>>>>>>>>>>>>> 00 00
>>>>>>>>>>>>>>>>> 0c 64
>>>>>>>>>>>>>>>>>> 02
>>>>>>>>>>>>>>>>>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 02 74
>>>>>>>>>>>>>>>>>> Platform Port Receive Buffer: 01 00 01 00 9d 00 00 00 11 02 00 00
>>>>>>>>>>>>>>>>>> 64
>>>>>>>>>>>>>>>>> 02 00
>>>>>>>>>>>>>>>>>> 00 74 4f e8 47 58 28 7f 27 57 6b 66 80 29 5e cb b2 b2 a3 61 29 77
>>>>>>>>>>>>>>>>>> 55
>>>>>>>>>>>>>>>>> 2f 44
>>>>>>>>>>>>>>>>>> 6e 47 c8 c5 93 ec 90 96 55 fc 6b 27 03 2a 9e ef 28 b5 49 05 02 03
>>>>>>>>>>>>>>>>>> 01
>>>>>>>>>>>>>>>>> 00 01
>>>>>>>>>>>>>>>>>> a3 81 9c 30 81 99 30 0c 06 03 55 1d 13 01 01 ff 04 02 30 00 30 0b
>>>>>>>>>>>>>>>>>> 06
>>>>>>>>>>>>>>>>> 03 55
>>>>>>>>>>>>>>>>>> 1d 0f 04 04 03 02 05 e0 30 1d 06 03 55 1d 0e 04 16 04 14 86 f9 ed
>>>>>>>>>>>>>>>>>> fa
>>>>>>>>>>>>>>>>> 46 3d
>>>>>>>>>>>>>>>>>> 7b 2b 5c 16 29 72 c6 b2 4b af b9 b2 8b df 30 31 06 03 55 1d 11 04
>>>>>>>>>>>>>>>>>> 2a
>>>>>>>>>>>>>>>>> 30 28
>>>>>>>>>>>>>>>>>> a0 26 06 0a 2b 06 01 04 01 83 1c 82 12 01 a0 18 0c 16 41 43 4d 45
>>>>>>>>>>>>>>>>>> 3a
>>>>>>>>>>>>>>>>> 57
>>>>>>>>>>>>>>>>>> 49 44 47 45 54 3a 31 32 33 34 35 36 37 38 39 30 30 2a 06 03 55 1d
>>>>>>>>>>>>>>>>>> 25
>>>>>>>>>>>>>>>>> 01
>>>>>>>>>>>>>>>>>> 01 ff 04 20 30 1e 06 08 2b 06 01 05 05 07 03 01 06 08 2b 06 01 05
>>>>>>>>>>>>>>>>>> 05
>>>>>>>>>>>>>>>>> 07 03
>>>>>>>>>>>>>>>>>> 02 06 08 2b 06 01 05 05 07 03 09 30 0d 06 09 2a 86 48 86 f7 0d 01
>>>>>>>>>>>>>>>>>> 01
>>>>>>>>>>>>>>>>> 0c
>>>>>>>>>>>>>>>>>> 05 00 03 82 01 81 00 81 69 45 3a 56 b5 12 ee 27 57 12 e1 bd 60 b6
>>>>>>>>>>>>>>>>>> ca
>>>>>>>>>>>>>>>>> c6 a4
>>>>>>>>>>>>>>>>>> d1 67 8c 8a e4 7c 9f e2 6f 9d b0 6e 6e e1 5d d8 b6 53 ac fb 68 d3
>>>>>>>>>>>>>>>>>> ee
>>>>>>>>>>>>>>>>> 55 fc
>>>>>>>>>>>>>>>>>> 04 69 ba 33 8d a0 9b cd 2c 6e a4 fd 04 0e ac 5c d4 2f ce d1 89 d9
>>>>>>>>>>>>>>>>>> 7e
>>>>>>>>>>>>>>>>> a1 e1
>>>>>>>>>>>>>>>>>> b4 0c 7c 79 bd 2c 51 50 2a 01 7d 06 82 87 f0 1c f3 72 3b 14 6c 45
>>>>>>>>>>>>>>>>>> e0
>>>>>>>>>>>>>>>>> 6b 25
>>>>>>>>>>>>>>>>>> 88 27 8e cb ec 21 98 c0 09 da 78 cc e7 39 10 0d d4 1a c2 0c 6d 31
>>>>>>>>>>>>>>>>>> 2e
>>>>>>>>>>>>>>>>> 3a 5f
>>>>>>>>>>>>>>>>>> 34 f9 ea 5c 10 c1 90 3a a1 ff 46 7d 16 77 a6 7c b7 f5 ce bf 57 6a
>>>>>>>>>>>>>>>>>> 73
>>>>>>>>>>>>>>>>> e0 bf f7
>>>>>>>>>>>>>>>>>> 22 ba 57 d4 a0 b5 67 8c 1e 8c 9c 9b e6 ee 9a 0b 75 69 26 ce 78 de
>>>>>>>>>>>>>>>>>> 24
>>>>>>>>>>>>>>>>> 21 85
>>>>>>>>>>>>>>>>>> 99 22 95 c5 fd a3 8a 1d c8 96 80 6a 26 aa c3 59 d9 de a7 31 03 59
>>>>>>>>>>>>>>>>>> 78
>>>>>>>>>>>>>>>>> 58 db
>>>>>>>>>>>>>>>>>> c3 7d 0e 3f 97 50 b4 0f 53 41 0d 4b dd 66 8d bb 57 b6 f7 f7 fb 43
>>>>>>>>>>>>>>>>>> 9e
>>>>>>>>>>>>>>>>> 25 3c
>>>>>>>>>>>>>>>>>> bc fa 20 84 bc 5d f8 71 3b af 6a e1 b1 84 41 d5 17 00 1d 9d 83 59
>>>>>>>>>>>>>>>>>> b2
>>>>>>>>>>>>>>>>> ce bd
>>>>>>>>>>>>>>>>>> 40 5a ba c6 52 45 2c 49 ff 10 d4 a1 e9 19 11 b5 3a 87 cc 74 76 f6
>>>>>>>>>>>>>>>>>> 4d
>>>>>>>>>>>>>>>>> 07 92
>>>>>>>>>>>>>>>>>> f1 98 53 07 96 89 9e 6c 70 cf 2e 2c 7d f1 dd d3 26 0a a8 39 23 1f
>>>>>>>>>>>>>>>>>> 5c
>>>>>>>>>>>>>>>>> 60 e7
>>>>>>>>>>>>>>>>>> 32 13 61 04 94 f9 ff 21 2a 00 9c c8 e7 e7 53 ef e0 73 25 be f0 7d
>>>>>>>>>>>>>>>>>> f9
>>>>>>>>>>>>>>>>> bd 49
>>>>>>>>>>>>>>>>>> 08 dd c0 1b 68 67 87 a2 8f 8b ed 95 12 dd 01 fc ac 10 b7 d3 60 dc
>>>>>>>>>>>>>>>>>> 03
>>>>>>>>>>>>>>>>> 2e 8d
>>>>>>>>>>>>>>>>>> ee 9b 85 1c 56 d5 a8 1d bb 0b 75 91 d7 b9 5d b5 f8 57 4f c5 4e 02
>>>>>>>>>>>>>>>>>> 34
>>>>>>>>>>>>>>>>> 76 a4
>>>>>>>>>>>>>>>>>> cd b9 42 c4 58 de 57 dc 75 31 e3 6c 2e 65 d0 Platform Port
>>>>>>>>>>>>>>>>>> Transmit
>>>>>>>>>>>>>>>>>> Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>>> 02 Platform Port Transmit Size: 00 00 00 2c
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> //This is the challenge auth.
>>>>>>>>>>>>>>>>>> Platform Port Transmit Buffer: 01 00 01 00 0b 00 00 00 11 83 00 00
>>>>>>>>>>>>>>>>>> af
>>>>>>>>>>>>>>>>> 2c d9
>>>>>>>>>>>>>>>>>> aa cb 59 67 ce 3f 7b 8f a5 26 00 4e 1f 1c 4e c3 1e 31 06 be 0d 9e
>>>>>>>>>>>>>>>>>> 4f
>>>>>>>>>>>>>>>>> f8 b1 7c
>>>>>>>>>>>>>>>>>> 2a 39 89
>>>>>>>>>>>>>>>>>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
>>>>>>>>>>>>>>>>>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 01 e0
>>>>>>>>>>>>>>>>>> Platform Port Receive Buffer: 01 00 01 00 78 00 00 00 11 03 80 01
>>>>>>>>>>>>>>>>>> 6b
>>>>>>>>>>>>>>>>> 3e 6a
>>>>>>>>>>>>>>>>>> 85 12 30 ed ec 1e 27 0e 6e 96 b0 95 68 eb b0 1f 9a 7a 63 f6 bd 04
>>>>>>>>>>>>>>>>>> 0d
>>>>>>>>>>>>>>>>> 04 cc
>>>>>>>>>>>>>>>>>> 45 0a 03 b9 aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59 61 17
>>>>>>>>>>>>>>>>>> 8f
>>>>>>>>>>>>>>>>> cf a6
>>>>>>>>>>>>>>>>>> 2d 0d e2 aa 90 91 06 7c 8e 3b 8b a7 64 7c 72 09 b2 9c 89 5b f1 30
>>>>>>>>>>>>>>>>>> 47
>>>>>>>>>>>>>>>>> e7 5b
>>>>>>>>>>>>>>>>>> 07 58 00 00 9c 43 d9 7b a3 ae c7 d4 bd 5e a8 db 74 b3 81 97 10 6e
>>>>>>>>>>>>>>>>>> 2f
>>>>>>>>>>>>>>>>> 22 5a
>>>>>>>>>>>>>>>>>> 26 c0 09 02 43 1d c1 3b dd cf e8 13 33 ff dc 02 39 15 2b 98 16 b5
>>>>>>>>>>>>>>>>>> eb
>>>>>>>>>>>>>>>>> 8e 63
>>>>>>>>>>>>>>>>>> 32 5a 3e 2a 6a 00 96 8e 42 5d 11 46 a6 7e d5 a8 76 11 94 2c a8 2c
>>>>>>>>>>>>>>>>>> c7
>>>>>>>>>>>>>>>>> 6d 48
>>>>>>>>>>>>>>>>>> 94 80 a0 fd 9a 7e 4a 84 59 c0 25 17 7d 0f d5 0d 93 75 02 1e 61 ef
>>>>>>>>>>>>>>>>>> 5e
>>>>>>>>>>>>>>>>> 5d 06
>>>>>>>>>>>>>>>>>> 80 64 4d 6a 47 91 c7 b1 ca e3 d5 ab b3 6c 97 8a f0 56 39 e6 3d a0
>>>>>>>>>>>>>>>>>> ad
>>>>>>>>>>>>>>>>> 96 20
>>>>>>>>>>>>>>>>>> 14 43 fc 83 5d 21 08 78 e8 85 69 a0 d2 e6 9a c9 a9 f6 96 66 ee 80
>>>>>>>>>>>>>>>>>> a6
>>>>>>>>>>>>>>>>> 06 a6
>>>>>>>>>>>>>>>>>> a6 ee cb 9b 7c e4 65 5f a5 0c 5a d9 5e de 50 d1 ab 73 8b c4 f7 3a
>>>>>>>>>>>>>>>>>> f2
>>>>>>>>>>>>>>>>> 62 59
>>>>>>>>>>>>>>>>>> 27 16 fa 42 1b e1 db 19 76 a8 40 06 25 d3 28 54 bf dd d4 75 1e 4f
>>>>>>>>>>>>>>>>>> 40
>>>>>>>>>>>>>>>>> d0 c4
>>>>>>>>>>>>>>>>>> 3e 1e 60 e7 4b 9b c9 c8 98 db a4 74 8f 86 39 ae 76 9c f9 c9 fe 63
>>>>>>>>>>>>>>>>>> ef
>>>>>>>>>>>>>>>>> 34 ab
>>>>>>>>>>>>>>>>>> 4d 0b 14 22 d0 d6 9e a3 fd 12 ab c3 7c 61 fd ea 09 dc 2d ad 78 6e
>>>>>>>>>>>>>>>>>> ce
>>>>>>>>>>>>>>>>> 13 2b
>>>>>>>>>>>>>>>>>> 95 36 83 34 3a 1b ef d3 fd 07 de b2 df c7 7a 83 bd 6e ab 51 70 99
>>>>>>>>>>>>>>>>>> 4e
>>>>>>>>>>>>>>>>> 28 07
>>>>>>>>>>>>>>>>>> de 63 42 ab 81 96 79 7f 30 27 28 4a 3e a1 8f 42 5f 7d cd 8f ec 86
>>>>>>>>>>>>>>>>>> e0
>>>>>>>>>>>>>>>>> ea 2b
>>>>>>>>>>>>>>>>>> fb 05 c2 ce ce 69 ae 4e 5c dd 95 85 11 23 a3 80 85 40 65 e3 a1 92
>>>>>>>>>>>>>>>>>> 18
>>>>>>>>>>>>>>>>> 9a dc
>>>>>>>>>>>>>>>>>> 31 ac 13 24 a3 a9 b9 5c 95 f5 b5 b5 08 ee 7d d8 ff 44 42 77 c4 09
>>>>>>>>>>>>>>>>>> 25
>>>>>>>>>>>>>>>>> 35 7c
>>>>>>>>>>>>>>>>>> b4 0b 64 77 ea 74 19 b7 b0 c1 04 6d 42 7e ab 32 91 e5 b1 59 2d 60
>>>>>>>>>>>>>>>>>> 31
>>>>>>>>>>>>>>>>> 11 5f
>>>>>>>>>>>>>>>>>> 38 52 36 d0 ba c0 73 d5 fb 5c b6 82 a1 00 00
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> from spdm_emu last message is better formatted.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> SpdmReceiveRequest[0] (0x24):
>>>>>>>>>>>>>>>>>> 0000: 11 83 00 00 af 2c d9 aa cb 59 67 ce 3f 7b 8f a5 26 00 4e 1f
>>>>>>>>>>>>>>>>>> 1c
>>>>>>>>>>>>>>>>> 4e c3
>>>>>>>>>>>>>>>>>> 1e 31 06 be 0d 9e 4f f8 b1
>>>>>>>>>>>>>>>>>> 0020: 7c 2a 39 89
>>>>>>>>>>>>>>>>>> SpdmSendResponse[0] ...
>>>>>>>>>>>>>>>>>> m1m2 hash - 6b c2 91 d6 c1 fe 1c 5e c9 bf 04 f6 fd 0f b1 58 9d 56
>>>>>>>>>>>>>>>>>> d3
>>>>>>>>>>>>>>>>> af 69
>>>>>>>>>>>>>>>>>> 08 3b eb 06 ba 6d b0 d2 e2 33 46 8a d8 ff 4d 9a 44 13 d2 04 57 e9
>>>>>>>>>>>>>>>>>> b9
>>>>>>>>>>>>>>>>> ce b7
>>>>>>>>>>>>>>>>>> b2 05
>>>>>>>>>>>>>>>>>> SpdmSendResponse[0] (0x1d6):
>>>>>>>>>>>>>>>>>> 0000: 11 03 80 01 6b 3e 6a 85 12 30 ed ec 1e 27 0e 6e 96 b0 95 68
>>>>>>>>>>>>>>>>>> eb
>>>>>>>>>>>>>>>>> b0 1f
>>>>>>>>>>>>>>>>>> 9a 7a 63 f6 bd 04 0d 04 cc
>>>>>>>>>>>>>>>>>> 0020: 45 0a 03 b9 aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59
>>>>>>>>>>>>>>>>>> 61
>>>>>>>>>>>>>>>>> 17 8f
>>>>>>>>>>>>>>>>>> cf a6 2d 0d e2 aa 90 91 06
>>>>>>>>>>>>>>>>>> 0040: 7c 8e 3b 8b a7 64 7c 72 09 b2 9c 89 5b f1 30 47 e7 5b 07 58
>>>>>>>>>>>>>>>>>> 00
>>>>>>>>>>>>>>>>> 00 9c
>>>>>>>>>>>>>>>>>> 43 d9 7b a3 ae c7 d4 bd 5e
>>>>>>>>>>>>>>>>>> 0060: a8 db 74 b3 81 97 10 6e 2f 22 5a 26 c0 09 02 43 1d c1 3b dd
>>>>>>>>>>>>>>>>>> cf
>>>>>>>>>>>>>>>>> e8 13
>>>>>>>>>>>>>>>>>> 33 ff dc 02 39 15 2b 98 16
>>>>>>>>>>>>>>>>>> 0080: b5 eb 8e 63 32 5a 3e 2a 6a 00 96 8e 42 5d 11 46 a6 7e d5 a8
>>>>>>>>>>>>>>>>>> 76
>>>>>>>>>>>>>>>>> 11 94
>>>>>>>>>>>>>>>>>> 2c a8 2c c7 6d 48 94 80 a0
>>>>>>>>>>>>>>>>>> 00a0: fd 9a 7e 4a 84 59 c0 25 17 7d 0f d5 0d 93 75 02 1e 61 ef 5e
>>>>>>>>>>>>>>>>>> 5d
>>>>>>>>>>>>>>>>> 06 80
>>>>>>>>>>>>>>>>>> 64 4d 6a 47 91 c7 b1 ca e3
>>>>>>>>>>>>>>>>>> 00c0: d5 ab b3 6c 97 8a f0 56 39 e6 3d a0 ad 96 20 14 43 fc 83 5d
>>>>>>>>>>>>>>>>>> 21
>>>>>>>>>>>>>>>>> 08 78
>>>>>>>>>>>>>>>>>> e8 85 69 a0 d2 e6 9a c9 a9
>>>>>>>>>>>>>>>>>> 00e0: f6 96 66 ee 80 a6 06 a6 a6 ee cb 9b 7c e4 65 5f a5 0c 5a d9
>>>>>>>>>>>>>>>>>> 5e
>>>>>>>>>>>>>>>>> de 50
>>>>>>>>>>>>>>>>>> d1 ab 73 8b c4 f7 3a f2 62
>>>>>>>>>>>>>>>>>> 0100: 59 27 16 fa 42 1b e1 db 19 76 a8 40 06 25 d3 28 54 bf dd d4
>>>>>>>>>>>>>>>>>> 75
>>>>>>>>>>>>>>>>> 1e 4f
>>>>>>>>>>>>>>>>>> 40 d0 c4 3e 1e 60 e7 4b 9b
>>>>>>>>>>>>>>>>>> 0120: c9 c8 98 db a4 74 8f 86 39 ae 76 9c f9 c9 fe 63 ef 34 ab 4d
>>>>>>>>>>>>>>>>>> 0b
>>>>>>>>>>>>>>>>> 14 22
>>>>>>>>>>>>>>>>>> d0 d6 9e a3 fd 12 ab c3 7c
>>>>>>>>>>>>>>>>>> 0140: 61 fd ea 09 dc 2d ad 78 6e ce 13 2b 95 36 83 34 3a 1b ef d3
>>>>>>>>>>>>>>>>>> fd
>>>>>>>>>>>>>>>>> 07 de
>>>>>>>>>>>>>>>>>> b2 df c7 7a 83 bd 6e ab 51
>>>>>>>>>>>>>>>>>> 0160: 70 99 4e 28 07 de 63 42 ab 81 96 79 7f 30 27 28 4a 3e a1 8f
>>>>>>>>>>>>>>>>>> 42
>>>>>>>>>>>>>>>>> 5f 7d
>>>>>>>>>>>>>>>>>> cd 8f ec 86 e0 ea 2b fb 05
>>>>>>>>>>>>>>>>>> 0180: c2 ce ce 69 ae 4e 5c dd 95 85 11 23 a3 80 85 40 65 e3 a1 92
>>>>>>>>>>>>>>>>>> 18
>>>>>>>>>>>>>>>>> 9a dc
>>>>>>>>>>>>>>>>>> 31 ac 13 24 a3 a9 b9 5c 95
>>>>>>>>>>>>>>>>>> 01a0: f5 b5 b5 08 ee 7d d8 ff 44 42 77 c4 09 25 35 7c b4 0b 64 77
>>>>>>>>>>>>>>>>>> ea
>>>>>>>>>>>>>>>>> 74 19
>>>>>>>>>>>>>>>>>> b7 b0 c1 04 6d 42 7e ab 32
>>>>>>>>>>>>>>>>>> 01c0: 91 e5 b1 59 2d 60 31 11 5f 38 52 36 d0 ba c0 73 d5 fb 5c b6
>>>>>>>>>>>>>>>>>> 82
>>>>>>>>>>>>>>>>> a1
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> I vaguely recall the running hash need for a challenge auth being
>>>>>>>>>>>>>>>>> rather hard
>>>>>>>>>>>>>>>>>> to get right but I had
>>>>>>>>>>>>>>>>>> the advantage of being able to compare how both sides built it up.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Jonathan
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Ah. Been a while, but IIRC correctly the spec doesn't make it
>>>>>>>>>>>>>>>>>> clear when signatures should be ASN.1. My basis for choosing
>>>>>>>>>>>>>>>>>> combinations in that code were what libSPDM did at the time. I
>>>>>>>>>>>>>>>>> remember
>>>>>>>>>>>>>>>>>> a bunch of trial and error and also hand decoding binary to try to
>>>>>>>>>>>>>>>>>> figure out what the encodings were. I also enjoyed those places
>>>>>>>>>>>>>>>>>> where various different ASN.1 encoded structures were concatenated
>>>>>>>>>>>>>>>>>> rather that encoded in one go - hence no cheap way to index to the
>>>>>>>>>>>>>>>>>> next one.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> I'm reviewing a nice short 972 page spec draft this week (which
>>>>>>>>>>>>>>>>>> will
>>>>>>>>>>>>>>>>> remain
>>>>>>>>>>>>>>>>>> unnamed :) but if I get time I'll see if I can test that path
>>>>>>>>>>>>>>>>>> before Tuesday.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> I think I ran basic tests on all the protocol types, but it was a
>>>>>>>>>>>>>>>>> long
>>>>>>>>>>>>>>>>>> time ago so possible I missed one.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> I meant to seek a spec clarification but haven't gotten around to
>>>>>>>>>>>>>>>>>> it
>>>>>>>>>>>>>>>>> yet.
>>>>>>>>>>>>>>>>>> Request from DMTF people was to file tickets against he spec for
>>>>>>>>>>>>>>>>> stuff
>>>>>>>>>>>>>>>>>> like that.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Jonathan
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>>>> Lorenzo
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> New Potential topic.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Scheduler Tuneables from NUMA topology.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> This is yangyicong's topic but I'll attempt to summarize:
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> https://lore.kernel.org/lkml/ef3b3e55-8be9-595f-6d54-886d13a7e2fd@h
>>>>>>>>>>>>>>>>> isi
>>>>>>>>>>>>>>>>> l
>>>>>>>>>>>>>>>>>> icon.com/
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> The scheduler contains a bunch of tunables including this one
>>>>>>>>>>>>>>>>>> which
>>>>>>>>>>>>>>>>> is
>>>>>>>>>>>>>>>>>> "migration cost"
>>>>>>>>>>>>>>>>>> This value is used to make decisions in load balancing + to
>>>>>>>>>>>>>>>>>> control
>>>>>>>>>>>>>>>>> the
>>>>>>>>>>>>>>>>>> frequency of load balancing
>>>>>>>>>>>>>>>>>> to avoid doing it too often. The default value has been fixed for
>>>>>>>>>>>>>>>>>> a
>>>>>>>>>>>>>>>>> long time
>>>>>>>>>>>>>>>>>> and systems have changed a lot in that time.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Currently the value is tunable via debugfs, but in the above
>>>>>>>>>>>>>>>>>> thread
>>>>>>>>>>>>>>>>> the
>>>>>>>>>>>>>>>>>> proposal
>>>>>>>>>>>>>>>>>> to somehow base the value on the system topology was made.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> We haven't yet proceeded very far with this but if we can get
>>>>>>>>>>>>>>>>> appropriate
>>>>>>>>>>>>>>>>>> people for
>>>>>>>>>>>>>>>>>> the call it may be a good opportunity to do some brainstorming,
>>>>>>>>>>>>>>>>> particularly
>>>>>>>>>>>>>>>>>> as
>>>>>>>>>>>>>>>>>> we don't have ready access to that many machine topologies so
>>>>>>>>>>>>>>>>>> testing
>>>>>>>>>>>>>>>>> any
>>>>>>>>>>>>>>>>>> proposal
>>>>>>>>>>>>>>>>>> will be very challenging. Also I fear this space is only going to
>>>>>>>>>>>>>>>>>> get
>>>>>>>>>>>>>>>>> more
>>>>>>>>>>>>>>>>>> complex
>>>>>>>>>>>>>>>>>> as systems get larger over the next year or two.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Next week may be too soon for such a discussion though given the
>>>>>>>>>>>>>>>>> short
>>>>>>>>>>>>>>>>>> notice!
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> +CC Vincent and Dietmar, but please drag anyone else in who is
>>>>>>>>>>>>>>>>> relevant to
>>>>>>>>>>>>>>>>>> this
>>>>>>>>>>>>>>>>>> discussion.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> I might also mention this topic at the LDCG meeting this week to
>>>>>>>>>>>>>>>>>> see
>>>>>>>>>>>>>>>>> if we
>>>>>>>>>>>>>>>>>> can
>>>>>>>>>>>>>>>>>> interest from others who might be able to help with data + testing.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks,
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Jonathan
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> 锟斤拷 2022锟斤拷4锟斤拷14锟秸ｏ拷锟斤拷锟斤拷8:00锟斤
>>>>>>>>>>>>>> 拷
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> linaro-open-discussions-request(a)op-lists.linaro.org<mailto:linaro-o
>>>>>>>>>>>>>>>>> pen-
>>>>>>>>>>>>>>>>> disc
>>>>>>>>>>>>>>>>>> ussions-request(a)op-lists.linaro.org>写锟斤拷锟斤拷
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Send Linaro-open-discussions mailing list submissions to
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-disc
>>>>>>>>>>>>>>>>> ussi
>>>>>>>>>>>>>>>>> ons
>>>>>>>>>>>>>>>>>> @op-lists.linaro.org>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> To subscribe or unsubscribe via email, send a message with subject
>>>>>>>>>>>>>>>>>> or body 'help' to
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> linaro-open-discussions-request(a)op-lists.linaro.org<mailto:linaro-o
>>>>>>>>>>>>>>>>> pen-
>>>>>>>>>>>>>>>>> disc
>>>>>>>>>>>>>>>>>> ussions-request(a)op-lists.linaro.org>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> You can reach the person managing the list at
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> linaro-open-discussions-owner(a)op-lists.linaro.org<mailto:linaro-ope
>>>>>>>>>>>>>>>>> n-di
>>>>>>>>>>>>>>>>> scu
>>>>>>>>>>>>>>>>>> ssions-owner(a)op-lists.linaro.org>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> When replying, please edit your Subject line so it is more
>>>>>>>>>>>>>>>>>> specific than "Re: Contents of Linaro-open-discussions digest..."
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Today's Topics:
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> 1. Re: LOD Call notes: 22 March 2022 - vCPU Hotplug Update
>>>>>>>>>>>>>>>>>> (Jonathan Cameron)
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> -------------------------------------------------------------------
>>>>>>>>>>>>>>>>> ---
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Message: 1
>>>>>>>>>>>>>>>>>> Date: Wed, 13 Apr 2022 19:17:32 +0100
>>>>>>>>>>>>>>>>>> From: Jonathan Cameron
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <Jonathan.Cameron(a)Huawei.com<mailto:Jonathan.Cameron@Huawei.com
>>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Subject: [Linaro-open-discussions] Re: LOD Call notes: 22 March
>>>>>>>>>>>>>>>>>> 2022
>>>>>>>>>>>>>>>>> -
>>>>>>>>>>>>>>>>>> vCPU Hotplug Update
>>>>>>>>>>>>>>>>>> To: Ilkka Koskinen
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <ilkka(a)os.amperecomputing.com<mailto:ilkka@os.amperecomputing.com>
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Cc:
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-disc
>>>>>>>>>>>>>>>>> ussi
>>>>>>>>>>>>>>>>> ons
>>>>>>>>>>>>>>>>>> @op-lists.linaro.org>
>>>>>>>>>>>>>>>>>> Message-ID:
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <20220413191732.00000e4e(a)Huawei.com<mailto:20220413191732.0000
>>>>>>>>>>>>>>>>>> 0e4e(a)Huawei.com>>
>>>>>>>>>>>>>>>>>> Content-Type: text/plain; charset="US-ASCII"
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> On Thu, 31 Mar 2022 11:47:26 -0700 (PDT) Ilkka Koskinen
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> <ilkka(a)os.amperecomputing.com<mailto:ilkka@os.amperecomputing.com>
>>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> wrote:
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Hi everyone,
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> On Tue, 22 Mar 2022, Jonathan Cameron via Linaro-open-discussions
>>>>>>>>>>>>>>>>> wrote:
>>>>>>>>>>>>>>>>>> Hi All,
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> A quick set of notes on the discussion on vCPU hotplug.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Great to have Ed join the discussion. If we are going to have
>>>>>>>>>>>>>>>>>> further calls on this topic we may want to move the time to be
>>>>>>>>>>>>>>>>>> more friendly for the US.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Current status
>>>>>>>>>>>>>>>>>> * ACPI spec change via code first route approved.
>>>>>>>>>>>>>>>>>> * Kernel patches being reworked / rebased by ARM. Expected to be
>>>>>>>>>>>>>>>>>> sent out in 5.19 cycle.
>>>>>>>>>>>>>>>>>> * QEMU patches being updated by Huawei. Will do at least some
>>>>>>>>>>>>>>>>>> light testing and then push out a public git tree so that others
>>>>>>>>>>>>>>>>>> can test - will
>>>>>>>>>>>>>>>>> aim
>>>>>>>>>>>>>>>>>> to do this so it aligns with kernel code availability.
>>>>>>>>>>>>>>>>>> * Ed (Ampere) gave an update to say they are interested in pushing
>>>>>>>>>>>>>>>>> this
>>>>>>>>>>>>>>>>>> forwards ASAP and have customer / OS vendor engagement which will
>>>>>>>>>>>>>>>>>> be very useful in moving towards a complete solution, particularly
>>>>>>>>>>>>>>>>> ensuring
>>>>>>>>>>>>>>>>>> good test coverage etc.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Noted that current QEMU patches may not cover all corner cases,
>>>>>>>>>>>>>>>>>> for example live migration of VMs that have vCPUs hotplugged.
>>>>>>>>>>>>>>>>>> Might 'just work'
>>>>>>>>>>>>>>>>>> but we haven't tested it yet so probably not.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Given we didn't really add anything on DOE / SPDM over previous
>>>>>>>>>>>>>>>>> calls,
>>>>>>>>>>>>>>>>>> I don't plan to send out anything on that topic this time.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks to Joyce for hosting the call. If I noted down anything
>>>>>>>>>>>>>>>>> wrong,
>>>>>>>>>>>>>>>>>> or incomplete let the list know.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Jonathan
>>>>>>>>>>>>>>>>>> --
>>>>>>>>>>>>>>>>>> Linaro-open-discussions mailing list --
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-disc
>>>>>>>>>>>>>>>>> ussi
>>>>>>>>>>>>>>>>> ons
>>>>>>>>>>>>>>>>>> @op-lists.linaro.org>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+
>>>>>>>>>>>>>>>>> Hom
>>>>>>>>>>>>>>>>> e
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks for the great meeting and the update! As Ed mentioned (and
>>>>>>>>>>>>>>>>>> you wrote above), we're interested in joining the vCPU Hotplug
>>>>>>>>>>>>>>>>> development.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Hi Ilkka
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Great to have you on board for this.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Status wise, on QEMU side we have the new interface up and running
>>>>>>>>>>>>>>>>>> (it was a whole 2 lines of code once we'd dealt with some rebasing
>>>>>>>>>>>>>>>>> related
>>>>>>>>>>>>>>>>>> issues).
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Rather more changes were needed to make it work sensibly on top of
>>>>>>>>>>>>>>>>> Gavin
>>>>>>>>>>>>>>>>>> Shan's
>>>>>>>>>>>>>>>>>> QEMU topology configuration patch set.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>> https://lore.kernel.org/qemu-devel/20220403145953.10522-1-gshan@re
>>>>>>>>>>>>>>>>>> dh
>>>>>>>>>>>>>>>>>> at.com/
>>>>>>>>>>>>>>>>>> The code going through some light internal review before we put it
>>>>>>>>>>>>>>>>>> up somewhere public. Note it's definitely not production quality
>>>>>>>>>>>>>>>>>> code but it is
>>>>>>>>>>>>>>>>> somewhere
>>>>>>>>>>>>>>>>>> to start from. Given Easter related vacations I doubt we'll get
>>>>>>>>>>>>>>>>> enough
>>>>>>>>>>>>>>>>>> eyes on it until next week.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> We were thrown briefly by the fact there is a recently added
>>>>>>>>>>>>>>>>>> apcica/actbl2.h entry for MADT_ONLINE_CAPABLE but it's a different
>>>>>>>>>>>>>>>>> bit.
>>>>>>>>>>>>>>>>>> Seems x86 folk wanted something similar last year. We'll have to
>>>>>>>>>>>>>>>>>> do something ugly in ACPICA to mangle the name for the new bit to
>>>>>>>>>>>>>>>>>> avoid that
>>>>>>>>>>>>>>>>> collision.
>>>>>>>>>>>>>>>>>> Lorenzo, I'm assuming the ACPCIA one line patch to add that define
>>>>>>>>>>>>>>>>>> is something the ARM team will deal with?
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> There are some known limitations though that we'll need to sort
>>>>>>>>>>>>>>>>>> out
>>>>>>>>>>>>>>>>> before
>>>>>>>>>>>>>>>>>> upstreaming the QEMU support. One of which is SVE currently breaks
>>>>>>>>>>>>>>>>> things.
>>>>>>>>>>>>>>>>>> Plenty of time though as kernel needs to be upstream first anyway.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Testing wise we are using QEMU on top of QEMU so we can poke
>>>>>>>>>>>>>>>>>> corners
>>>>>>>>>>>>>>>>> of
>>>>>>>>>>>>>>>>>> the
>>>>>>>>>>>>>>>>>> architecture don't have hardware for (e.g. SVE :). Even on a
>>>>>>>>>>>>>>>>>> rubbish
>>>>>>>>>>>>>>>>> x86
>>>>>>>>>>>>>>>>>> desktop it's not that slow :)
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Lorenzo, any update on kernel side of things or expected time
>>>>>>>>>>>>>>>>>> scale
>>>>>>>>>>>>>>>>> for
>>>>>>>>>>>>>>>>>> more information?
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Obviously we have some hacked patches based on Salil's original
>>>>>>>>>>>>>>>>> proposal
>>>>>>>>>>>>>>>>>> that sanity check the QEMU side of things but I suspect the final
>>>>>>>>>>>>>>>>> version
>>>>>>>>>>>>>>>>>> will look rather different :)
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> One question on the spec change for Lorenzo. It's not entirely
>>>>>>>>>>>>>>>>>> clear but I think we should not be using _MAT when 'hotplugging' the
>>>>>>>>>>>>>> vCPUs?
>>>>>>>>>>>>>>>>>> For now the QEMU code provides the relevant entries anyway but it
>>>>>>>>>>>>>>>>>> would be nice to drop that if not necessary (it's not a huge
>>>>>>>>>>>>>>>>>> amount of code or complexity though so not a big thing either way).
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Thanks and an early happy Easter to those celebrating on Sunday.
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Jonathan
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Br, Ilkka
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> ------------------------------
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Subject: Digest Footer
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> Linaro-open-discussions mailing list --
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-disc
>>>>>>>>>>>>>>>>> ussi
>>>>>>>>>>>>>>>>> ons
>>>>>>>>>>>>>>>>>> @op-lists.linaro.org>
>>>>>>>>>>>>>>>>>> To unsubscribe send an email to
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> linaro-open-discussions-leave(a)op-lists.linaro.org<mailto:linaro-ope
>>>>>>>>>>>>>>>>> n-di
>>>>>>>>>>>>>>>>> scus
>>>>>>>>>>>>>>>>>> sions-leave(a)op-lists.linaro.org>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> ------------------------------
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> End of Linaro-open-discussions Digest, Vol 19, Issue 1
>>>>>>>>>>>>>>>>>> ******************************************************
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>> --
>>>>>>>>>>>>>>>>>> Linaro-open-discussions mailing list --
>>>>>>>>>>>>>>>>>> linaro-open-discussions(a)op-lists.linaro.org
>>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>>> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+
>>>>>>>>>>>>>>>>> Hom
>>>>>>>>>>>>>>>>> e
>>>>>>>>>>>>>>>>> --
>>>>>>>>>>>>>>>>> Linaro-open-discussions mailing list --
>>>>>>>>>>>>>>>>> linaro-open-discussions(a)op-lists.linaro.org
>>>>>>>>>>>>>>>>> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+
>>>>>>>>>>>>>>>>> Hom e IMPORTANT NOTICE: The contents of this email and any
>>>>>>>>>>>>>>>>> attachments are confidential and may also be privileged. If you are
>>>>>>>>>>>>>>>>> not the intended recipient, please notify the sender immediately and do
>>>>>>>>>>>>>> not disclose the contents to any other person, use it for any purpose, or store
>>>>>>>>>>>>>> or copy the information in any medium. Thank you.
>>>>>>>>>>>>>>>>
>>>>>>>>>>>>>>>> IMPORTANT NOTICE: The contents of this email and any attachments are
>>>>>>>>>>>>>> confidential and may also be privileged. If you are not the intended recipient,
>>>>>>>>>>>>>> please notify the sender immediately and do not disclose the contents to any
>>>>>>>>>>>>>> other person, use it for any purpose, or store or copy the information in any
>>>>>>>>>>>>>> medium. Thank you.
>>>>>>>>>>>>>>>
>>>>>>>>>>>>
>>>>>>>>>>>> .
>>>>>>>>>>>>
>>>>>>>>>>
>>>>>>>>> .
>>>>>>>>>
>>>>
>>>> Thanks:)
>>>> Joyce
>>>>
>>
>> Thanks
>> Joyce
>
>
> ------------------------------
>
> Subject: Digest Footer
>
> Linaro-open-discussions mailing list -- linaro-open-discussions(a)op-lists.linaro.org
> To unsubscribe send an email to linaro-open-discussions-leave(a)op-lists.linaro.org
>
>
> ------------------------------
>
> End of Linaro-open-discussions Digest, Vol 33, Issue 19
> *******************************************************
9 months, 2 weeks
- 3
- 5
Re: 回复：Re: 回复：Li =?utf-8?Q?naro-open-discussions_call_on_May___24th
by Shameerali Kolothum Thodi
> -----Original Message-----
> From: Lorenzo Pieralisi [mailto:lorenzo.pieralisi@gmail.com]
> Sent: 25 July 2022 10:46
> To: Joyce Qi <joyce.qi(a)linaro.org>
> Cc: Jonathan Cameron <jonathan.cameron(a)huawei.com>; Shameerali
> Kolothum Thodi <shameerali.kolothum.thodi(a)huawei.com>; Jonathon
> Burcham <jon.burcham(a)linaro.org>; yangyicong
> <yangyicong(a)huawei.com>; Hesham Almatary
> <hesham.almatary(a)huawei.com>; shenyang (M)
> <shenyang39(a)huawei.com>; tangchengchang
> <tangchengchang(a)huawei.com>; Dietmar Eggemann
> <Dietmar.Eggemann(a)arm.com>; linaro-open-discussions(a)op-lists.linaro.org;
> Lorenzo Pieralisi <lorenzo.pieralisi(a)linaro.org>
> Subject: Re: [Linaro-open-discussions] 回复：Re: 回复：Li
> =?utf-8?Q?naro-open-discussions_call_on_May___24th
>
> On Thu, 21 Jul 2022 at 16:28, Joyce Qi <joyce.qi(a)linaro.org> wrote:
> >
> > Hi Jonatha,Lorenz,Shamee,
> >
> > Do you have any topics want to sync on July 26’s LOD meeting?
>
> [dropped my arm.com address and added @linaro.org one]
>
> I am just catching up after a 2 month hiatus but if there is anything urgent to
> be discussed I am happy to join the call and run the meeting.
Met too just back after holidays and don't have anything urgent for discussion
from my end. Also, Jonathan is away this week.
Thanks,
Shameer
> Lorenzo
>
> >
> > Thanks:)
> > Joyce
> >
> >
> > > 在 2022年6月24日，下午10:38，Jonathan Cameron
> <jonathan.cameron(a)huawei.com>
> > > 写道：
> > >
> > > My availability that week is going to be hard to predict (at a workshop in
> Germany) but SPDM topic can wait.
> > > I just wanted to confirm general interest and email works fine for that.
> > >
> > > Good for others to have a sync meeting and if I can dial in for a bit I will
> do so.
> > >
> > > Jonathan
> > >
> > >
> > >
> > > -----Original Message-----
> > > From: Lorenzo Pieralisi <Lorenzo.Pieralisi(a)arm.com>
> > > Sent: 24 June 2022 15:30
> > > To: Joyce Qi <joyce.qi(a)linaro.org>
> > > Cc: Shameerali Kolothum Thodi
> > > <shameerali.kolothum.thodi(a)huawei.com>; Jonathan Cameron
> > > <jonathan.cameron(a)huawei.com>; Lorenzo Pieralisi
> > > <lpieralisi(a)kernel.org>; Jonathon Burcham <jon.burcham(a)linaro.org>;
> > > yangyicong <yangyicong(a)huawei.com>; Hesham Almatary
> > > <hesham.almatary(a)huawei.com>; shenyang (M)
> <shenyang39(a)huawei.com>;
> > > tangchengchang <tangchengchang(a)huawei.com>; Dietmar Eggemann
> > > <Dietmar.Eggemann(a)arm.com>;
> > > linaro-open-discussions(a)op-lists.linaro.org;
> > > lorenzo.pieralisi(a)gmail.com
> > > Subject: Re: [Linaro-open-discussions] 回复：Re: 回复：Li
> > > =?utf-8?Q?naro-open-discussions_call_on_May___24th
> > >
> > > Hi,
> > >
> > > Moving to July 5th is fine by me.
> > >
> > > For IORT RMR I'd encourage Shameer to ping the mailing list for SMMU
> ACKs and not wait till July 5th, I believe I acked the relevant patches.
> > >
> > > I CC'ed my personal email since the email address I am sending from will
> stop working tonight.
> > >
> > > Thanks,
> > > Lorenzo
> > >
> > >
> > >
> > > ________________________________________
> > > From: Joyce Qi <joyce.qi(a)linaro.org>
> > > Sent: 24 June 2022 15:25
> > > To: Lorenzo Pieralisi
> > > Cc: Shameerali Kolothum Thodi; Jonathan Cameron; Lorenzo Pieralisi;
> > > Jonathon Burcham; yangyicong; Hesham Almatary; shenyang (M);
> > > tangchengchang; Dietmar Eggemann;
> > > linaro-open-discussions(a)op-lists.linaro.org
> > > Subject: Re: [Linaro-open-discussions] 回复：Re: 回复：Li
> > > =?utf-8?Q?naro-open-discussions_call_on_May___24th
> > >
> > > Hi Lorenzo，Jonathan，Shameerali，
> > >
> > > Thanks for all your feedback，So can we move the LOD to July 5th for
> > > the SPDM discussions？
> > > If that’s ok，I can reschedule the LDO meeting.
> > >
> > > Thanks:)
> > > Joyce
> > >
> > >
> > >
> > >> 在 2022年6月24日，下午8:51，Lorenzo Pieralisi
> <Lorenzo.Pieralisi(a)arm.com>
> > >> 写道：
> > >>
> > >> Hi,
> > >>
> > >> I am traveling, I am interested on the SPDM discussions, I did not
> > >> think there is much left to do wrt IORT RMR (other than merging it
> > >> and decide who does that) but we can talk on thursday, just use
> > >> lorenzo.pieralisi(a)gmail.com please to send the invite.
> > >>
> > >> If we can talk week starting July 4th honestly it would even be
> > >> better.
> > >>
> > >> Thanks,
> > >> Lorenzo
> > >>
> > >> ________________________________________
> > >> From: joyce.qi--- via Linaro-open-discussions
> > >> <linaro-open-discussions(a)op-lists.linaro.org>
> > >> Sent: 24 June 2022 11:33
> > >> To: Shameerali Kolothum Thodi; Jonathan Cameron; Lorenzo Pieralisi
> > >> Cc: Jonathon Burcham; yangyicong; Hesham Almatary; shenyang (M);
> > >> tangchengchang; Dietmar Eggemann;
> > >> linaro-open-discussions(a)op-lists.linaro.org
> > >> Subject: [Linaro-open-discussions] 回复：Re: 回复：Li
> > >> =?utf-8?Q?naro-open-discussions_call_on_May___24th
> > >>
> > >> Hi Jonanthan，Shameerali，
> > >> Thanks a lot for your input here：）
> > >> @Lorenzo，
> > >> Are you available on next Thuesday’s LOD meeting for checking the
> > >> status on IORT RMR series Shameerali has brought up？
> > >> Thanks：）
> > >> Joyce
> > >>
> > >> -------- 原始邮件 --------
> > >> 发件人： Shameerali Kolothum Thodi
> > >> <shameerali.kolothum.thodi(a)huawei.com>
> > >> 日期： 2022年6月24日周五 傍晚5:24
> > >> 收件人： Jonathan Cameron <jonathan.cameron(a)huawei.com>,
> > >> joyce.qi(a)linaro.org, Lorenzo Pieralisi <lpieralisi(a)kernel.org>
> > >> 抄送： Jonathon Burcham <jon.burcham(a)linaro.org>, yangyicong
> > >> <yangyicong(a)huawei.com>, Hesham Almatary
> > >> <hesham.almatary(a)huawei.com>, "shenyang (M)"
> > >> <shenyang39(a)huawei.com>, tangchengchang
> > >> <tangchengchang(a)huawei.com>, Dietmar Eggemann
> > >> <dietmar.eggemann(a)arm.com>,
> > >> linaro-open-discussions(a)op-lists.linaro.org
> > >> 主 题： RE: [Linaro-open-discussions] Re: 回复：Li
> > >> =?utf-8?Q?naro-open-discussions_call_on_May___24th
> > >>> -----Original Message-----
> > >>> From: Jonathan Cameron via Linaro-open-discussions
> > >>> [mailto:linaro-open-discussions@op-lists.linaro.org]
> > >>> Sent: 24 June 2022 10:13
> > >>> To: joyce.qi(a)linaro.org
> > >>> Cc: Jonathan Cameron via Linaro-open-discussions
> > >>> <linaro-open-discussions(a)op-lists.linaro.org>; Jonathon Burcham
> > >>> <jon.burcham(a)linaro.org>; yangyicong <yangyicong(a)huawei.com>;
> > >>> Hesham Almatary <hesham.almatary(a)huawei.com>; shenyang (M)
> > >>> <shenyang39(a)huawei.com>; tangchengchang
> > >>> <tangchengchang(a)huawei.com>; Dietmar Eggemann
> > >>> <dietmar.eggemann(a)arm.com>
> > >>> Subject: [Linaro-open-discussions] Re: 回复：Linaro-open-discussions
> > >> call on
> > >>> May 24th
> > >>>
> > >>>
> > >>> Hi Joyce,
> > >>>
> > >>> Thanks for the reminder. I don’t think it is worth discussing at
> > >> LOD as not
> > >>> the right people on the call, but I would like to draw attention
> > >>> to a
> > >> thread
> > >>> discussing whether to propose a SPDM BoF at Linux Plumbers:
> > >>>
> https://lore.kernel.org/linux-cxl/20220609124702.000037b0@Huawei.c
> > >>> om/
> > >>>
> > >>> At the moment I plan to speculatively put in a proposal, but may
> > >> withdraw it
> > >>> if not enough people would be involved to make useful progress.
> > >>> The big ‘discussion’ point is how much to do in kernel vs in
> > >> Userspace.
> > >>>
> > >>> I’ve just polled some of my colleagues for any other topics they
> > >> would like to
> > >>> raise on LOD, but for now I don’t have anything ready to talk about.
> > >> If Lorenzo is around, would like to check the status on IORT RMR
> > >> series.
> > >> I have sent out the v13 here,
> > >>
> > >> https://lore.kernel.org/linux-acpi/20220615101044.1972-8-shameerali
> > >> .kol
> > >> othum.thodi(a)huawei.com/T/
> > >> Thanks,
> > >> Shameer
> > >>> Thanks,
> > >>>
> > >>> Jonathan
> > >>>
> > >>>
> > >>> From: joyce.qi(a)linaro.org <joyce.qi(a)linaro.org>
> > >>> Sent: 24 June 2022 10:06
> > >>> To: Jonathan Cameron <jonathan.cameron(a)huawei.com>
> > >>> Cc: Jonathan Cameron via Linaro-open-discussions
> > >>> <linaro-open-discussions(a)op-lists.linaro.org>; Lorenzo Pieralisi
> > >>> <lorenzo.pieralisi(a)arm.com>; Jonathon Burcham
> > >> <jon.burcham(a)linaro.org>;
> > >>> yangyicong <yangyicong(a)huawei.com>; Hesham Almatary
> > >>> <hesham.almatary(a)huawei.com>; shenyang (M)
> > >>> <shenyang39(a)huawei.com>; tangchengchang
> > >>> <tangchengchang(a)huawei.com>; Dietmar Eggemann
> > >>> <dietmar.eggemann(a)arm.com>
> > >>> Subject: 回复：[Linaro-open-discussions] Linaro-open-discussions call
> > >>> on May 24th
> > >>>
> > >>> Hi Jonanthan，all
> > >>>
> > >>> Do you have anything to sync during next week's LOD meeting?
> > >>>
> > >>> Thanks
> > >>> Joyce
> > >>>
> > >>>
> > >>> -------- 原始邮件 --------
> > >>> 发件人： Joyce Qi <joyce.qi(a)linaro.org<mailto:joyce.qi@linaro.org>>
> > >>> 日期： 2022年5月24日周二 早上7:08
> > >>> 收件人： Jonathan Cameron
> > >>>
> <jonathan.cameron(a)huawei.com<mailto:jonathan.cameron@huawei.com>>
> > >>> 抄送： Jonathan Cameron via Linaro-open-discussions
> > >>>
> > >>
> > >> <linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-dis
> > >> cuss
> > >> ions
> > >>> @op-lists.linaro.org>>, Lorenzo Pieralisi
> > >>> <lorenzo.pieralisi(a)arm.com<mailto:lorenzo.pieralisi@arm.com>>,
> > >> Jonathon
> > >>> Burcham <jon.burcham(a)linaro.org<mailto:jon.burcham@linaro.org>>,
> > >>> yangyicong
> <yangyicong(a)huawei.com<mailto:yangyicong@huawei.com>>,
> > >>> Hesham Almatary
> > >>>
> <hesham.almatary(a)huawei.com<mailto:hesham.almatary@huawei.com>>,
> > >>> "shenyang (M)"
> > >>> <shenyang39(a)huawei.com<mailto:shenyang39@huawei.com>>,
> > >>> tangchengchang
> > >>>
> <tangchengchang(a)huawei.com<mailto:tangchengchang@huawei.com>>,
> > >>> Dietmar Eggemann
> > >>> <dietmar.eggemann(a)arm.com<mailto:dietmar.eggemann@arm.com>>
> > >>> 主 题： Re: [Linaro-open-discussions] Linaro-open-discussions call on
> > >> May
> > >>> 24th
> > >>> Hi Jonathan,all
> > >>>
> > >>> Thanks for the confirm.
> > >>> I will cancel today’s meeting since no topic:)
> > >>>
> > >>> Thanks:)
> > >>> Joyce
> > >>>
> > >>> 在 2022年5月20日，下午7:10，Jonathan Cameron
> > >>>
> <jonathan.cameron(a)huawei.com<mailto:jonathan.cameron@huawei.com>>
> > >>> 写道：
> > >>>
> > >>> Hi Joyce,
> > >>>
> > >>> Nothing to discuss from me. Anyone else have anything they want
> > >>> to
> > >> bring
> > >>> up?
> > >>>
> > >>> Thanks,
> > >>>
> > >>> Jonathan
> > >>>
> > >>>
> > >>> From: Joyce Qi <joyce.qi(a)linaro.org<mailto:joyce.qi@linaro.org>>
> > >>> Sent: 18 May 2022 10:37
> > >>> To: Jonathan Cameron
> > >>>
> <jonathan.cameron(a)huawei.com<mailto:jonathan.cameron@huawei.com>>
> > >>> Cc: Jonathan Cameron via Linaro-open-discussions
> > >>>
> > >>
> > >> <linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-dis
> > >> cuss
> > >> ions
> > >>> @op-lists.linaro.org>>; Lorenzo Pieralisi
> > >>> <lorenzo.pieralisi(a)arm.com<mailto:lorenzo.pieralisi@arm.com>>;
> > >> Jonathon
> > >>> Burcham <jon.burcham(a)linaro.org<mailto:jon.burcham@linaro.org>>;
> > >>> yangyicong
> <yangyicong(a)huawei.com<mailto:yangyicong@huawei.com>>;
> > >>> Hesham Almatary
> > >>>
> <hesham.almatary(a)huawei.com<mailto:hesham.almatary@huawei.com>>;
> > >>> shenyang (M)
> > >>> <shenyang39(a)huawei.com<mailto:shenyang39@huawei.com>>;
> > >>> tangchengchang
> > >>>
> <tangchengchang(a)huawei.com<mailto:tangchengchang@huawei.com>>;
> > >>> Dietmar Eggemann
> > >>> <dietmar.eggemann(a)arm.com<mailto:dietmar.eggemann@arm.com>>
> > >>> Subject: Re: [Linaro-open-discussions] Linaro-open-discussions
> > >>> call
> > >> on May
> > >>> 24th
> > >>>
> > >>> Hi Jonathan, Lorenz ,all,
> > >>>
> > >>> Do you have any topic to discuss during the Linaro open
> > >>> discussions
> > >> next
> > >>> Tuesday?
> > >>>
> > >>> Thanks:)
> > >>> Joyce
> > >>>
> > >>>
> > >>>
> > >>> 在 2022年4月26日，上午1:45，Jonathan Cameron
> > >>>
> <Jonathan.Cameron(a)huawei.com<mailto:Jonathan.Cameron@huawei.com>
> >
> > >>> 写道：
> > >>>
> > >>> On Fri, 22 Apr 2022 14:00:06 +0100 Jonathan Cameron via
> > >>> Linaro-open-discussions
> > >>>
> > >>
> > >> <linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-dis
> > >> cuss
> > >> ions
> > >>> @op-lists.linaro.org>> wrote:
> > >>>
> > >>> On Fri, 22 Apr 2022 11:33:29 +0100 Lorenzo Pieralisi
> > >>> <lorenzo.pieralisi(a)arm.com<mailto:lorenzo.pieralisi@arm.com>>
> wrote:
> > >>>
> > >>> On Fri, Apr 22, 2022 at 10:36:43AM +0100, Jonathan Cameron wrote:
> > >>> On Thu, 21 Apr 2022 21:32:01 +0800 Joyce Qi via
> > >>> Linaro-open-discussions
> > >>>
> > >>
> > >> <linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-dis
> > >> cuss
> > >> ions
> > >>> @op-lists.linaro.org>> wrote:
> > >>>
> > >>> Hi Jonathon锟斤拷Lorenzo锟斤拷
> > >>>
> > >>> Do we have some topic to discuss for the Linaro-open-disscussions
> > >> next
> > >>> week?
> > >>>
> > >>> Thanks:)
> > >>> Joyce
> > >>>
> > >>> Hi Joyce,
> > >>>
> > >>> Thanks for the reminder. So topics:
> > >>>
> > >>> RMR: Nothing from our side
> > >>>
> > >>> vCPUHP: we have a 'working' QEMU tree though it has some known
> > >>> problems (doesn't work with SVE for some reason - so some
> > >>> debugging
> > >> to
> > >>> do). Should be able to upload that shortly for anyone else who
> > >>> wants to play with it. Any updates on progress of kernel patches
> > >>> from ARM side would be good but email is fine for that.
> > >>>
> > >>> Could not work on them, I need to figure out a plan and quickly,
> > >>> we can talk about that though, I should be able to have a clearer
> > >>> picture by Tuesday.
> > >>>
> > >>> I am still using your SPDM stack and there are a couple of things
> > >>> I don't get (eg CHALLENGE_AUTH signature verification, RSA path,
> > >>> spdm_asym_rsassa_3072 path in spdm_verify_signature() - just
> > >>> wanted to ask if you tested this path, I am struggling with
> > >>> signature verification - just wanted to ask in particular about
> > >>> the need for
> > >>> ASN.1 encoding to use verify_signature()).
> > >>>
> > >>> Tested this again and it seems to be working (tm)
> > >>>
> > >>> Here are the logs... Just in case you fancy hand decoding the
> > >> exchange.
> > >>>
> > >>> Sig should be the very last bit of the last message (ignoring the
> > >>> 00
> > >> pad IIRC)
> > >>>
> > >>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
> > >>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
> > >>> 0c Platform Port Transmit Buffer: 01 00 01 00 03 00 00 00 10 84 00
> > >>> 00 Platform Port Receive Command: 00 00 00 01 Platform Port
> > >>> Receive
> > >>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 14
> > >>> Platform Port Receive Buffer: 01 00 01 00 05 00 00 00 10 04 00 00
> > >>> 00
> > >> 03 00
> > >>> 10 00 11 00 12
> > >>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
> > >>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
> > >>> 0c Platform Port Transmit Buffer: 01 00 01 00 03 00 00 00 10 84 00
> > >>> 00 Platform Port Receive Command: 00 00 00 01 Platform Port
> > >>> Receive
> > >>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 14
> > >>> Platform Port Receive Buffer: 01 00 01 00 05 00 00 00 10 04 00 00
> > >>> 00
> > >> 03 00
> > >>> 10 00 11 00 12
> > >>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
> > >>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
> > >>> 14 Platform Port Transmit Buffer: 01 00 01 00 05 00 00 00 11 e1
> > >>> 00 00
> > >> 00 02
> > >>> 00 00 c6 f7 00 00
> > >>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
> > >>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 14
> > >>> Platform Port Receive Buffer: 01 00 01 00 05 00 00 00 11 61 00 00
> > >>> 00
> > >> 00 00
> > >>> 00 f7 fb 00 00
> > >>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
> > >>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
> > >>> 38 Platform Port Transmit Buffer: 01 00 01 00 0e 00 00 00 11 e3
> > >>> 04 00
> > >> 30 00
> > >>> 01 00 94 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> > >>> 00
> > >> 00
> > >>> 00 00 02 20 1b 00 03 20 06 00 04 20 94 00 05 20 01 00 Platform
> > >>> Port Receive Command: 00 00 00 01 Platform Port Receive
> > >>> TransportType: 00
> > >>> 00 00 02 Platform Port Receive Size: 00 00 00 3c Platform Port
> > >>> Receive Buffer: 01 00 01 00 0f 00 00 00 11 63 04 00 34
> > >> 00
> > >>> 01 00 08 00 00 00 04 00 00 00 02 00 00 00 00 00 00 00 00 00 00 00
> > >>> 00
> > >> 00
> > >>> 00 00 00 00 00 00 02 20 10 00 03 20 02 00 04 20 04 00 05 20 01 00
> > >>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
> > >>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
> > >>> 0c Platform Port Transmit Buffer: 01 00 01 00 03 00 00 00 11 81 00
> > >>> 00 Platform Port Receive Command: 00 00 00 01 Platform Port
> > >>> Receive
> > >>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 00 9c
> > >>> Platform Port Receive Buffer: 01 00 01 00 27 00 00 00 11 01 00 07
> > >>> 6b
> > >> 3e 6a
> > >>> 85 12 30 ed ec 1e 27 0e 6e 96 b0 95 68 eb b0 1f 9a 7a 63 f6 bd 04
> > >>> 0d
> > >> 04 cc
> > >>> 45 0a 03 b9 aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59 6b 3e
> > >>> 6a
> > >> 85 12
> > >>> 30 ed ec 1e 27 0e 6e 96 b0 95 68 eb b0 1f 9a 7a 63 f6 bd 04 0d 04
> > >>> cc
> > >> 45 0a
> > >>> 03 b9 aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59 6b 3e 6a 85
> > >>> 12
> > >> 30 ed
> > >>> ec 1e 27 0e 6e 96 b0 95 68 eb b0 1f 9a 7a 63 f6 bd 04 0d 04 cc 45
> > >>> 0a
> > >> 03 b9
> > >>> aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59 Platform Port
> > >>> Transmit Command: 00 00 00 01 Platform Port Transmit TransportType:
> > >>> 00 00 00 02 Platform Port Transmit Size: 00 00 00 10 Platform Port
> > >>> Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00 00 00
> > >> 00 00
> > >>> 80
> > >>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
> > >>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 04 10
> > >>> Platform Port Receive Buffer: 01 00 01 00 04 01 00 00 11 02 00 00
> > >>> 00
> > >> 04 64
> > >>> 0a 64 0e 00 00 99 e0 d4 22 35 22 e5 ba 58 24 e7 1e eb cf 9a 2c b5
> > >>> b5
> > >> 71 10
> > >>> ce aa 50 f5 64 83 78 d8 2d 9e 3b 99 53 74 db 98 d0 6f 63 cd 84 35
> > >>> c5
> > >> 10 cc
> > >>> 21 f3 e0 30 82 05 19 30 82 03 01 a0 03 02 01 02 02 14 22 4d 06 18
> > >>> d5
> > >> d4
> > >>> a8 45 bf 5d f5 56 06 47 3f 90 a9 20 21 27 30 0d 06 09 2a 86 48 86
> > >>> f7
> > >> 0d 01
> > >>> 01 0c 05 00 30 1c 31 1a 30 18 06 03 55 04 03 0c 11 69 6e 74 65 6c
> > >>> 20
> > >> 74 65
> > >>> 73 74 20 52 53 41 20 43 41 30 1e 17 0d 32 32 30 33 30 33 31 31 33
> > >>> 38
> > >> 34
> > >>> 32 5a 17 0d 33 32 30 32 32 39 31 31 33 38 34 32 5a 30 1c 31 1a 30
> > >>> 18
> > >> 06
> > >>> 03 55 04 03 0c 11 69 6e 74 65 6c 20 74 65 73 74 20 52 53 41 20 43
> > >>> 41
> > >> 30
> > >>> 82 02 22 30 0d 06 09 2a 86 48 86 f7 0d 01 01 01 05 00 03 82 02 0f
> > >>> 00
> > >> 30 82
> > >>> 02 0a 02 82 02 01 00 b6 80 53 6e c7 66 9e 23 0f e9 2a d4 68 59 54
> > >>> ec
> > >> bc cd
> > >>> dd 1d 37 52 f9 fb 48 ed 9b 8e e5 20 77 a0 57 26 ba a4 e4 44 95 9c
> > >>> 13
> > >> 30 36
> > >>> b8 03 39 33 58 4f 0f 19 5f 28 21 ee 52 f4 b0 4c 7b c1 86 94 ed 12
> > >>> cf
> > >> 1b 24
> > >>> d2 20 d8 6a 7b 33 86 3e 84 b8 0e 57 06 14 fb ff a5 a7 05 ca 75 0c
> > >>> b2
> > >> f0 d7
> > >>> 58 d0 b5 92 de ff a5 82 54 90 35 60 f3 c8 8f 2f 16 5f 89 91 5b 42
> > >>> 14
> > >> 04 23
> > >>> 44 04 54 2f 36 ab f7 29 91 9e 45 46 09 fc d9 45 29 a8 08 83 68 18
> > >>> 58
> > >> d3 7b
> > >>> 9a b4 0e 3a b7 08 19 6f c2 7c 14 0f a3 3e fa ad 99 71 35 a5 fc ef
> > >>> c1
> > >> 31 93 ae
> > >>> db a7 5c 67 e1 e7 ef 53 8b ab 3e 48 6d d1 78 86 84 41 43 97 4d af
> > >>> d4
> > >> 55 42
> > >>> 4b 3c 8a 5e c9 bb 10 8a 6e 62 2d bc d6 29 de cf ae 2b f8 66 e0 a8
> > >>> 0e
> > >> 9a 86
> > >>> e5 dd fc 85 ae 9c a9 28 a0 7d e8 93 7f cf 1b e2 7a d0 d4 c0 3c 92
> > >>> 88
> > >> 06 ba
> > >>> 3a d3 18 3c a1 98 f2 95 3a b5 0c 98 57 97 06 22 91 a7 86 c9 87 a3
> > >>> b1
> > >> da 71
> > >>> d6 14 79 a1 94 5b da fc d5 2e b3 4a 4f c2 8b 4a 99 44 4c da 3b 43
> > >>> 1c
> > >> 35 4d
> > >>> e1 a7 18 b9 d8 be fb 49 5f a7 51 20 08 e7 43 2b 81 ae da 7f 67 82
> > >>> 50
> > >> a7 4d
> > >>> 4a d2 65 04 57 5a 4a 74 66 da f3 58 9a cd 12 49 8e af 3b d8 ee 5c
> > >>> 56
> > >> 72 37
> > >>> 2d 8d ca 57 10 d4 b5 cc 35 95 18 76 aa 20 dc 5f 45 b8 19 98 9f b7
> > >>> 94
> > >> 8f 05
> > >>> 9e 3e f8 ee 51 7d 23 47 20 29 07 fa d4 d6 c2 28 4a 79 6a b3 3b ec
> > >>> c3
> > >> 64 ee
> > >>> 78 4c d2 72 95 74 5b 8c 90 25 d4 11 68 89 fe bc 8e e4 a3 fa d6 b4
> > >>> 6c
> > >> 46 63
> > >>> 31 99 25 06 5a 30 85 4a 0e 22 38 b7 33 07 65 11 1b 12 88 0b 71 37
> > >>> 20
> > >> 2b
> > >>> 54 00 43 30 24 e9 22 98 1b 6d 6c da 98 02 8d 36 6b 08 1f 03 90 e4
> > >>> bb
> > >> dc 0b
> > >>> c4 3d b0 00 93 ab d9 11 6f da 04 32 48 3c 61 d0 d6 7b 5d 72 f8 3c
> > >>> 85
> > >> 65 9f
> > >>> b6 c0 5f 0d a7 1e d6 ad d8 0a a1 70 1f b8 3a f8 8b 4b 99 02 03 01
> > >>> 00
> > >> 01 a3
> > >>> 53 30 51 30 1d 06 03 55 1d 0e 04 16 04 14 b3 c1 9a d7 32 bf 99 6b
> > >>> 9f
> > >> 77 8a
> > >>> 11 f4 fc 24 92 43 f7 f7 ec 30 1f 06 03 55 1d 23 04 18 30 16 80 14
> > >>> b3
> > >> c1 9a
> > >>> d7 32 bf 99 6b 9f 77 8a 11 f4 fc 24 92 43 f7 f7 ec 30 0f 06 03 55
> > >>> 1d
> > >> 13 01 01
> > >>> ff 04 05 30 03 01 01 ff 30 0d 06 09 2a 86 48 86 f7 0d 01 01 0c 05
> > >>> 00
> > >> 03 82
> > >>> 02 01 00 72 e2 8c aa 49 24 3f e9 53 a6 15 6d a0 da ed b8 ac d7 9b
> > >>> fd
> > >> 9b 19
> > >>> e3 e1 b4 27 36 79 24 63 03 0b f5 55 6c 22 cc 81 a7 1f 8c 90 d1 3e
> > >>> f8
> > >> cd f1
> > >>> 79 8a ae 1f 4c aa 2b 6a 1b a5 4d cf fe 71 44 96 f6 f1 c6 d7 6d 38
> > >>> a5
> > >> fd 95 49
> > >>> fb cb 0f c9 c6 6a 5f d1 85 ff ba e5 cb ef f8 43 de 7e ac 92 2c b3
> > >>> 2c
> > >> 57 a6 39
> > >>> f8 d2 ae c4 06 e8 3d 35 01 e7 30 51 74 e2 28 a2 6f 10 69 3d d8 96
> > >>> d8
> > >> 61 f5
> > >>> ff d3 29 86 26 e2 57 23 dc 8d 77 1a 31 f0 6f df a7 50 34 28 4a e3
> > >>> de
> > >> 55 d0
> > >>> a2 6f 8a db a1 54 7a ac 9f d3 e8 c5 1f 55 2c 2e fc 37 c9 4c a1 22
> > >>> a4
> > >> e4 20 77
> > >>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
> > >>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
> > >>> 10 Platform Port Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00
> > >>> 00 00
> > >> 04 64
> > >>> 0a
> > >>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
> > >>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 04 10
> > >>> Platform Port Receive Buffer: 01 00 01 00 04 01 00 00 11 02 00 00
> > >>> 00
> > >> 04 64
> > >>> 06 84 86 e0 3e 11 8b 72 c3 92 16 95 d5 32 0f 81 3d d1 0e d0 f8 3a
> > >>> e6
> > >> 20 fe
> > >>> d8 ae 5a c1 27 2c 18 1f 60 40 fa 89 10 05 33 f7 35 9d 5c 35 29 0d
> > >>> b3
> > >> 26 94
> > >>> 48 eb 75 a3 d5 a8 74 22 80 56 40 cc 74 60 c1 03 d5 32 5d 3d 24 4c
> > >>> b3
> > >> 5e b2
> > >>> f5 5b 61 f1 d7 fa 40 71 45 af 67 c5 fc 5a ee 32 10 5f eb 6c 68 be
> > >>> 00
> > >> e1 0a e9
> > >>> 23 0d 06 6d fb b8 af 3a 9a 33 d1 b0 eb 89 5f c9 26 ba b8 91 ab cd
> > >>> 55
> > >> 90 24
> > >>> 22 1b 3b 15 11 fe 61 22 de ae d7 19 45 b1 bf 09 09 2f c7 8f 57 b1
> > >>> 2b
> > >> 37 b5
> > >>> 9d 4d f2 8b 2d ea 29 f5 17 bb 11 2f 5b 59 1b 43 65 d1 60 15 b9 ba
> > >>> ca
> > >> 0b a4
> > >>> bd 25 ec ba 5d 55 45 ab 02 2d fb 16 3e d6 82 01 a7 62 1a c7 77 77
> > >>> da
> > >> 5f 4d
> > >>> f2 a2 f5 14 24 e8 ab 63 16 a4 5d f0 ec 5e 1c 9a 72 a2 86 dd 2b ba
> > >>> 88
> > >> d5 98
> > >>> 56 c7 1c 63 2e 59 eb 4a a7 df 55 7e 0c 77 ae de 9b 88 e2 93 47 27
> > >>> 62
> > >> c7 d4
> > >>> 0e 5d a4 16 05 ca 78 bd b9 67 d9 e7 c1 c8 41 23 94 de ae 5f e7 b6
> > >>> 50
> > >> 76 d5
> > >>> 4d d5 ce d6 b5 d4 78 53 c0 18 6d 7f c5 f0 34 29 ba 9a 14 ba f2 13
> > >>> 07
> > >> 4a 0f
> > >>> e9 bd 1b fa 4e 20 4c 73 5e eb 9a 6d 3c bb 3b 61 e7 bf 71 cc c0 7a
> > >>> d2
> > >> bf a7
> > >>> 26 b9 9a bc 2d a0 22 18 12 1d 04 87 30 82 04 a0 30 82 02 88 a0 03
> > >>> 02
> > >> 01
> > >>> 02 02 01 01 30 0d 06 09 2a 86 48 86 f7 0d 01 01 0c 05 00 30 1c 31
> > >>> 1a
> > >> 30 18
> > >>> 06 03 55 04 03 0c 11 69 6e 74 65 6c 20 74 65 73 74 20 52 53 41 20
> > >>> 43
> > >> 41
> > >>> 30 1e 17 0d 32 32 30 33 30 33 31 31 34 30 30 33 5a 17 0d 33 32 30
> > >>> 32
> > >> 32
> > >>> 39 31 31 34 30 30 33 5a 30 2b 31 29 30 27 06 03 55 04 03 0c 20 69
> > >>> 6e
> > >> 74
> > >>> 65 6c 20 74 65 73 74 20 52 53 41 20 69 6e 74 65 72 6d 65 64 69 61
> > >>> 74
> > >> 65
> > >>> 20 63 65 72 74 30 82 01 a2 30 0d 06 09 2a 86 48 86 f7 0d 01 01 01
> > >>> 05
> > >> 00
> > >>> 03 82 01 8f 00 30 82 01 8a 02 82 01 81 00 ab 97 02 85 a7 a4 8c 17
> > >>> 29
> > >> 31 0c
> > >>> b2 0d f6 e4 3d 76 00 ce e1 1b 19 9b e9 84 f5 36 10 1f d5 e6 60 fe
> > >>> 8a
> > >> e4 0a
> > >>> 53 63 23 7c f8 57 8d 7f 2b a8 10 78 dd 40 ef a8 65 33 47 a4 fc b6
> > >>> f8
> > >> 23 b3
> > >>> 4b 28 8e c8 98 29 02 55 93 54 35 5d 2c fd d8 a4 5d 02 bb c5 06 61
> > >>> 72
> > >> cb 77
> > >>> a1 f6 ed 83 68 ec 4f a7 17 4b 29 89 52 40 9a f3 09 20 1e 4d e1 98
> > >>> 37
> > >> 70 de
> > >>> 7c b9 77 2a 77 3d 41 e3 09 e4 d2 57 87 4b de 19 b9 c7 74 bc ec ac
> > >>> 98
> > >> b0 0e
> > >>> 2e 36 1e f7 8d 05 ab d4 a2 2b 0b fc a3 61 8d 08 bb ce 74 0a a1 d4
> > >>> b6
> > >> 38 80
> > >>> ab a8 be f3 d1 5d 5f 6e cd c7 4b af 85 2f a5 e1 5e 74 0c c8 be a2
> > >>> 67
> > >> 98 c7
> > >>> 61 45 d7 2a ee 88 93 4f d5 ef 83 11 dc 37 a0 38 20 97 c9 24 c3 3a
> > >>> 26
> > >> 69 90
> > >>> 1e da 97 87 51 55 33 ef bc 13 b8 68 e8 da e0 68 53 90 11 03 83 43
> > >>> 85
> > >> f6 69
> > >>> 7c d7 07 d4 51 72 94 f5 44 02 7c cb bf 2e f0 1c d7 5b ac ab a7 ac
> > >>> 35
> > >> b7 f4
> > >>> 19 cc 78 86 b6 ac 38 17 b3 37 09 5d b5 3f 65 e1 a8 7e 7b 42 0d cb
> > >>> 24
> > >> e9 3d
> > >>> fc d8 06 2e bc b3 1b 1c 2f 26 cf d2 24 f4 f7 7b 22 fd f1 6a 4e a9
> > >>> 73
> > >> 0a ea c5
> > >>> 11 b9 d3 07 57 f6 b7 d4 df 66 2a 84 7b ec 0b 77 93 69 d6 06 e1 96
> > >>> 97
> > >> 4c 7e
> > >>> 72 51 be a4 d1 d6 41 33 d8 69 41 f8 3f 57 44 48 82 ad 34 26 e1 2f
> > >>> f6
> > >> d4 fd
> > >>> dd 6f a7 e1 55 69 5c 64 a6 a2 a1 70 aa 6f dd a0 cb 3c 9f ce 87 13
> > >>> 02
> > >> 03 01
> > >>> 00 01 a3 5e 30 5c 30 0c 06 03 55 1d 13 04 05 30 03 01 01 ff 30 0b
> > >>> 06
> > >> 03 55
> > >>> 1d 0f 04 04 03 02 01 fe 30 1d 06 03 55 1d 0e 04 16 04 14 c1 3f 34
> > >>> 2e
> > >> d9 40
> > >>> de 6a 8d b4 45 ed 8a a0 6b b6 73 03 2b e5 30 20 06 03 55 1d 25 01
> > >>> 01
> > >> ff 04
> > >>> 16 30 14 06 08 2b 06 01 05 05 07 03 01 06 08 2b 06 01 05 05 07 03
> > >>> 02
> > >> 30
> > >>> 0d 06 09 2a 86 48 86 f7 0d 01 01 0c 05 00 03 82 02 01 00 7d 96 9d
> > >>> 42
> > >> 20 f4
> > >>> 5c 80 19 d9 31
> > >>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
> > >>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
> > >>> 10 Platform Port Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00
> > >>> 00 00
> > >> 08 64
> > >>> 06
> > >>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
> > >>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 04 10
> > >>> Platform Port Receive Buffer: 01 00 01 00 04 01 00 00 11 02 00 00
> > >>> 00
> > >> 04 64
> > >>> 02 d9 f4 22 2b c9 ea 52 0f 3e a8 e1 fb 87 b9 28 8a c6 70 32 5f a5
> > >>> 4e
> > >> a9 a2
> > >>> 22 ed 38 36 69 38 20 07 81 f2 b0 80 b6 05 5f b3 26 8b 60 08 ac fa
> > >>> db
> > >> 78 08
> > >>> 20 c7 c5 3c 70 85 b8 e3 3c 81 45 3e 2b d9 6f e9 bf bf b9 d7 59 bd
> > >>> 80
> > >> 46 87
> > >>> 08 f8 72 1e 44 b6 c4 17 2e 0e fe 51 28 d3 a5 d4 18 7e b6 64 ba 45
> > >>> 4f
> > >> bc 51
> > >>> dd 38 70 e7 1f 0f 07 4d 75 b5 3e 2c 95 ca 11 0b a7 12 0f 25 8d ed
> > >>> 0a
> > >> 4b 6f
> > >>> 96 e2 14 22 2d f7 96 64 6a c9 3a eb 09 71 89 ae 8d 82 2e 31 d6 46
> > >>> 58
> > >> 6c 85
> > >>> 3b dc 14 1f c3 5c b3 02 fe ef 26 f1 8a d3 70 50 88 45 bd c8 f7 57
> > >>> 24
> > >> 1b ef 01
> > >>> 8b 84 42 30 bb 1b 51 f4 e5 c2 02 6f ae 42 1d 4c a8 08 b2 75 c8 9b
> > >>> 6c
> > >> 6f 75
> > >>> e9 97 4a b3 f3 17 54 90 3b 1d c1 c7 e7 08 8a 88 5f 42 67 b5 04 4d
> > >>> 4f
> > >> b8 b9
> > >>> 5f 60 69 3a 1b 6a ee 39 3d 72 09 c4 80 5e 89 15 12 87 39 68 63 7c
> > >>> 65
> > >> ed b4
> > >>> f1 12 d9 b9 82 30 74 0b aa 40 14 e0 33 f7 98 af 31 db e8 81 62 92
> > >>> e6
> > >> fc 9b
> > >>> 6b 88 f9 cc c1 e4 6f 95 d2 86 f2 34 8f 48 c7 37 45 8e 25 07 26 f7
> > >>> 18
> > >> 75 04
> > >>> 12 e6 16 6f 50 09 26 c9 8e 36 3e 41 6d 90 d0 31 13 e9 47 3c c9 c4
> > >>> f3
> > >> c1 b0
> > >>> 1c 20 1c c8 95 4d 18 8d 46 83 35 fa 95 03 36 88 68 55 df a3 8d 79
> > >>> 9b
> > >> eb 16
> > >>> bf 88 38 10 db 8c c2 f1 20 1b 36 a7 3b 44 26 bd c1 29 7f 02 98 a7
> > >>> 31
> > >> aa cd
> > >>> 60 c7 ee 15 a4 b2 be 66 07 47 ea 89 95 5f 32 c6 bf 2e b5 66 46 5a
> > >>> e1
> > >> 79 f2
> > >>> cd 4a 39 e0 9d f1 74 2f 00 6b e4 60 20 88 f0 53 83 26 6d ee ac a6
> > >>> f6
> > >> 54 47
> > >>> e2 7a 58 a6 29 1d c7 50 a9 91 0c 68 ff fd 7b 25 a2 f3 34 b2 15 bd
> > >>> f4
> > >> 7d cf 9e
> > >>> f1 4c 0d 86 39 b2 3e 80 e9 94 15 55 c8 af 8c d2 a9 6e 61 ce e5 23
> > >>> 22
> > >> dc 4e
> > >>> b8 1c 41 68 7a b2 30 23 1c f2 6e 22 2e bd cc 6a 99 0b 1b eb 58 05
> > >>> 1c
> > >> 04 c3
> > >>> 30 82 04 6b 30 82 02 d3 a0 03 02 01 02 02 01 03 30 0d 06 09 2a 86
> > >>> 48
> > >> 86
> > >>> f7 0d 01 01 0c 05 00 30 2b 31 29 30 27 06 03 55 04 03 0c 20 69 6e
> > >>> 74
> > >> 65 6c
> > >>> 20 74 65 73 74 20 52 53 41 20 69 6e 74 65 72 6d 65 64 69 61 74 65
> > >>> 20
> > >> 63
> > >>> 65 72 74 30 1e 17 0d 32 32 30 33 30 33 31 31 34 30 32 34 5a 17 0d
> > >>> 33
> > >> 32
> > >>> 30 32 32 39 31 31 34 30 32 34 5a 30 28 31 26 30 24 06 03 55 04 03
> > >>> 0c
> > >> 1d
> > >>> 69 6e 74 65 6c 20 74 65 73 74 20 52 53 41 20 72 65 73 70 6f 6e 64
> > >>> 65
> > >> 72 20
> > >>> 63 65 72 74 30 82 01 a2 30 0d 06 09 2a 86 48 86 f7 0d 01 01 01 05
> > >>> 00
> > >> 03
> > >>> 82 01 8f 00 30 82 01 8a 02 82 01 81 00 a3 d7 6e f3 b7 4f 50 46 6c
> > >>> 67
> > >> 7f 61
> > >>> 1a 30 85 a7 5a 8d b9 1f 29 76 86 57 5c cd 5c 20 fe b3 74 59 20 69
> > >>> 5e
> > >> 8f de
> > >>> 22 cb a8 e9 f0 fb 3a 1a 45 be ef 50 46 b3 fc fe 74 ea e5 9d 0e 8d
> > >>> 3e
> > >> b8 13 a5
> > >>> d2 7b 67 49 f6 6b 2d 7c 97 64 d1 24 ae c4 25 3f bf 67 9a 27 5d 72
> > >>> df
> > >> 23 87
> > >>> d9 53 ba 8d de a7 3d cd e4 1c 9f 66 50 f4 e0 b7 96 97 36 2b 1a f6
> > >>> 38
> > >> d8 7e
> > >>> 0e c4 70 bc 7c 00 4a 74 89 9b 62 a5 82 d9 6a 69 b7 23 aa 74 9e ef
> > >>> 7c
> > >> b9 59
> > >>> 12 4c 8f 4e a2 42 5c d1 32 54 39 ea ca 64 e0 33 50 6c df f5 12 8e
> > >>> 1c
> > >> 3d 51
> > >>> fe da b8 57 6e 7b 42 2d b6 ec 21 92 af 08 f2 89 c8 19 a4 d5 32 56
> > >>> 62
> > >> c2 a3
> > >>> f5 cc ec d4 eb 07 74 28 a5 5c 0b 1c 7a 4e 03 3a d5 c8 4e 39 25 4a
> > >>> 9b
> > >> ce 9a
> > >>> 63 1a 15 2c 98 4b 64 04 2c 9b 7d 92 32 36 33 60 8b ec 2c a8 5d 95
> > >>> 74
> > >> 06 3f
> > >>> 83 cb 62 12 84 b8 dd 68 eb 1c 18 6b 84 cc b6 ef 4f a8 3b e1 0f 0a
> > >>> 09
> > >> 46 c6
> > >>> 0f fe 24 55 8c 85 a1 3d 37 b1 ff 29 55 5b 23 f1 91 df cc 9d 38 48
> > >>> 72
> > >> 0a 55
> > >>> b7 45 42 25 c3 05 67 b4 bc 17 cd fd a3 7b 1c e4 d8 b1 8b 42 b2 47
> > >>> 1b
> > >> b7 99
> > >>> 4d 8a fd fe 52 80 94 58 e0 81 37 9a 91 61 93 e4 49 5e 69 16 32 4c
> > >>> 03
> > >> 7c 42
> > >>> 2e d1
> > >>> Platform Port Transmit Command: 00 00 00 01 Platform Port Transmit
> > >>> TransportType: 00 00 00 02 Platform Port Transmit Size: 00 00 00
> > >>> 10 Platform Port Transmit Buffer: 01 00 01 00 04 00 00 00 11 82 00
> > >>> 00 00
> > >> 0c 64
> > >>> 02
> > >>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
> > >>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 02 74
> > >>> Platform Port Receive Buffer: 01 00 01 00 9d 00 00 00 11 02 00 00
> > >>> 64
> > >> 02 00
> > >>> 00 74 4f e8 47 58 28 7f 27 57 6b 66 80 29 5e cb b2 b2 a3 61 29 77
> > >>> 55
> > >> 2f 44
> > >>> 6e 47 c8 c5 93 ec 90 96 55 fc 6b 27 03 2a 9e ef 28 b5 49 05 02 03
> > >>> 01
> > >> 00 01
> > >>> a3 81 9c 30 81 99 30 0c 06 03 55 1d 13 01 01 ff 04 02 30 00 30 0b
> > >>> 06
> > >> 03 55
> > >>> 1d 0f 04 04 03 02 05 e0 30 1d 06 03 55 1d 0e 04 16 04 14 86 f9 ed
> > >>> fa
> > >> 46 3d
> > >>> 7b 2b 5c 16 29 72 c6 b2 4b af b9 b2 8b df 30 31 06 03 55 1d 11 04
> > >>> 2a
> > >> 30 28
> > >>> a0 26 06 0a 2b 06 01 04 01 83 1c 82 12 01 a0 18 0c 16 41 43 4d 45
> > >>> 3a
> > >> 57
> > >>> 49 44 47 45 54 3a 31 32 33 34 35 36 37 38 39 30 30 2a 06 03 55 1d
> > >>> 25
> > >> 01
> > >>> 01 ff 04 20 30 1e 06 08 2b 06 01 05 05 07 03 01 06 08 2b 06 01 05
> > >>> 05
> > >> 07 03
> > >>> 02 06 08 2b 06 01 05 05 07 03 09 30 0d 06 09 2a 86 48 86 f7 0d 01
> > >>> 01
> > >> 0c
> > >>> 05 00 03 82 01 81 00 81 69 45 3a 56 b5 12 ee 27 57 12 e1 bd 60 b6
> > >>> ca
> > >> c6 a4
> > >>> d1 67 8c 8a e4 7c 9f e2 6f 9d b0 6e 6e e1 5d d8 b6 53 ac fb 68 d3
> > >>> ee
> > >> 55 fc
> > >>> 04 69 ba 33 8d a0 9b cd 2c 6e a4 fd 04 0e ac 5c d4 2f ce d1 89 d9
> > >>> 7e
> > >> a1 e1
> > >>> b4 0c 7c 79 bd 2c 51 50 2a 01 7d 06 82 87 f0 1c f3 72 3b 14 6c 45
> > >>> e0
> > >> 6b 25
> > >>> 88 27 8e cb ec 21 98 c0 09 da 78 cc e7 39 10 0d d4 1a c2 0c 6d 31
> > >>> 2e
> > >> 3a 5f
> > >>> 34 f9 ea 5c 10 c1 90 3a a1 ff 46 7d 16 77 a6 7c b7 f5 ce bf 57 6a
> > >>> 73
> > >> e0 bf f7
> > >>> 22 ba 57 d4 a0 b5 67 8c 1e 8c 9c 9b e6 ee 9a 0b 75 69 26 ce 78 de
> > >>> 24
> > >> 21 85
> > >>> 99 22 95 c5 fd a3 8a 1d c8 96 80 6a 26 aa c3 59 d9 de a7 31 03 59
> > >>> 78
> > >> 58 db
> > >>> c3 7d 0e 3f 97 50 b4 0f 53 41 0d 4b dd 66 8d bb 57 b6 f7 f7 fb 43
> > >>> 9e
> > >> 25 3c
> > >>> bc fa 20 84 bc 5d f8 71 3b af 6a e1 b1 84 41 d5 17 00 1d 9d 83 59
> > >>> b2
> > >> ce bd
> > >>> 40 5a ba c6 52 45 2c 49 ff 10 d4 a1 e9 19 11 b5 3a 87 cc 74 76 f6
> > >>> 4d
> > >> 07 92
> > >>> f1 98 53 07 96 89 9e 6c 70 cf 2e 2c 7d f1 dd d3 26 0a a8 39 23 1f
> > >>> 5c
> > >> 60 e7
> > >>> 32 13 61 04 94 f9 ff 21 2a 00 9c c8 e7 e7 53 ef e0 73 25 be f0 7d
> > >>> f9
> > >> bd 49
> > >>> 08 dd c0 1b 68 67 87 a2 8f 8b ed 95 12 dd 01 fc ac 10 b7 d3 60 dc
> > >>> 03
> > >> 2e 8d
> > >>> ee 9b 85 1c 56 d5 a8 1d bb 0b 75 91 d7 b9 5d b5 f8 57 4f c5 4e 02
> > >>> 34
> > >> 76 a4
> > >>> cd b9 42 c4 58 de 57 dc 75 31 e3 6c 2e 65 d0 Platform Port
> > >>> Transmit
> > >>> Command: 00 00 00 01 Platform Port Transmit TransportType: 00 00
> > >>> 00
> > >>> 02 Platform Port Transmit Size: 00 00 00 2c
> > >>>
> > >>> //This is the challenge auth.
> > >>> Platform Port Transmit Buffer: 01 00 01 00 0b 00 00 00 11 83 00 00
> > >>> af
> > >> 2c d9
> > >>> aa cb 59 67 ce 3f 7b 8f a5 26 00 4e 1f 1c 4e c3 1e 31 06 be 0d 9e
> > >>> 4f
> > >> f8 b1 7c
> > >>> 2a 39 89
> > >>> Platform Port Receive Command: 00 00 00 01 Platform Port Receive
> > >>> TransportType: 00 00 00 02 Platform Port Receive Size: 00 00 01 e0
> > >>> Platform Port Receive Buffer: 01 00 01 00 78 00 00 00 11 03 80 01
> > >>> 6b
> > >> 3e 6a
> > >>> 85 12 30 ed ec 1e 27 0e 6e 96 b0 95 68 eb b0 1f 9a 7a 63 f6 bd 04
> > >>> 0d
> > >> 04 cc
> > >>> 45 0a 03 b9 aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59 61 17
> > >>> 8f
> > >> cf a6
> > >>> 2d 0d e2 aa 90 91 06 7c 8e 3b 8b a7 64 7c 72 09 b2 9c 89 5b f1 30
> > >>> 47
> > >> e7 5b
> > >>> 07 58 00 00 9c 43 d9 7b a3 ae c7 d4 bd 5e a8 db 74 b3 81 97 10 6e
> > >>> 2f
> > >> 22 5a
> > >>> 26 c0 09 02 43 1d c1 3b dd cf e8 13 33 ff dc 02 39 15 2b 98 16 b5
> > >>> eb
> > >> 8e 63
> > >>> 32 5a 3e 2a 6a 00 96 8e 42 5d 11 46 a6 7e d5 a8 76 11 94 2c a8 2c
> > >>> c7
> > >> 6d 48
> > >>> 94 80 a0 fd 9a 7e 4a 84 59 c0 25 17 7d 0f d5 0d 93 75 02 1e 61 ef
> > >>> 5e
> > >> 5d 06
> > >>> 80 64 4d 6a 47 91 c7 b1 ca e3 d5 ab b3 6c 97 8a f0 56 39 e6 3d a0
> > >>> ad
> > >> 96 20
> > >>> 14 43 fc 83 5d 21 08 78 e8 85 69 a0 d2 e6 9a c9 a9 f6 96 66 ee 80
> > >>> a6
> > >> 06 a6
> > >>> a6 ee cb 9b 7c e4 65 5f a5 0c 5a d9 5e de 50 d1 ab 73 8b c4 f7 3a
> > >>> f2
> > >> 62 59
> > >>> 27 16 fa 42 1b e1 db 19 76 a8 40 06 25 d3 28 54 bf dd d4 75 1e 4f
> > >>> 40
> > >> d0 c4
> > >>> 3e 1e 60 e7 4b 9b c9 c8 98 db a4 74 8f 86 39 ae 76 9c f9 c9 fe 63
> > >>> ef
> > >> 34 ab
> > >>> 4d 0b 14 22 d0 d6 9e a3 fd 12 ab c3 7c 61 fd ea 09 dc 2d ad 78 6e
> > >>> ce
> > >> 13 2b
> > >>> 95 36 83 34 3a 1b ef d3 fd 07 de b2 df c7 7a 83 bd 6e ab 51 70 99
> > >>> 4e
> > >> 28 07
> > >>> de 63 42 ab 81 96 79 7f 30 27 28 4a 3e a1 8f 42 5f 7d cd 8f ec 86
> > >>> e0
> > >> ea 2b
> > >>> fb 05 c2 ce ce 69 ae 4e 5c dd 95 85 11 23 a3 80 85 40 65 e3 a1 92
> > >>> 18
> > >> 9a dc
> > >>> 31 ac 13 24 a3 a9 b9 5c 95 f5 b5 b5 08 ee 7d d8 ff 44 42 77 c4 09
> > >>> 25
> > >> 35 7c
> > >>> b4 0b 64 77 ea 74 19 b7 b0 c1 04 6d 42 7e ab 32 91 e5 b1 59 2d 60
> > >>> 31
> > >> 11 5f
> > >>> 38 52 36 d0 ba c0 73 d5 fb 5c b6 82 a1 00 00
> > >>>
> > >>> from spdm_emu last message is better formatted.
> > >>>
> > >>> SpdmReceiveRequest[0] (0x24):
> > >>> 0000: 11 83 00 00 af 2c d9 aa cb 59 67 ce 3f 7b 8f a5 26 00 4e 1f
> > >>> 1c
> > >> 4e c3
> > >>> 1e 31 06 be 0d 9e 4f f8 b1
> > >>> 0020: 7c 2a 39 89
> > >>> SpdmSendResponse[0] ...
> > >>> m1m2 hash - 6b c2 91 d6 c1 fe 1c 5e c9 bf 04 f6 fd 0f b1 58 9d 56
> > >>> d3
> > >> af 69
> > >>> 08 3b eb 06 ba 6d b0 d2 e2 33 46 8a d8 ff 4d 9a 44 13 d2 04 57 e9
> > >>> b9
> > >> ce b7
> > >>> b2 05
> > >>> SpdmSendResponse[0] (0x1d6):
> > >>> 0000: 11 03 80 01 6b 3e 6a 85 12 30 ed ec 1e 27 0e 6e 96 b0 95 68
> > >>> eb
> > >> b0 1f
> > >>> 9a 7a 63 f6 bd 04 0d 04 cc
> > >>> 0020: 45 0a 03 b9 aa d6 e7 1b 7e 85 04 ae 18 55 8d 47 58 c4 cd 59
> > >>> 61
> > >> 17 8f
> > >>> cf a6 2d 0d e2 aa 90 91 06
> > >>> 0040: 7c 8e 3b 8b a7 64 7c 72 09 b2 9c 89 5b f1 30 47 e7 5b 07 58
> > >>> 00
> > >> 00 9c
> > >>> 43 d9 7b a3 ae c7 d4 bd 5e
> > >>> 0060: a8 db 74 b3 81 97 10 6e 2f 22 5a 26 c0 09 02 43 1d c1 3b dd
> > >>> cf
> > >> e8 13
> > >>> 33 ff dc 02 39 15 2b 98 16
> > >>> 0080: b5 eb 8e 63 32 5a 3e 2a 6a 00 96 8e 42 5d 11 46 a6 7e d5 a8
> > >>> 76
> > >> 11 94
> > >>> 2c a8 2c c7 6d 48 94 80 a0
> > >>> 00a0: fd 9a 7e 4a 84 59 c0 25 17 7d 0f d5 0d 93 75 02 1e 61 ef 5e
> > >>> 5d
> > >> 06 80
> > >>> 64 4d 6a 47 91 c7 b1 ca e3
> > >>> 00c0: d5 ab b3 6c 97 8a f0 56 39 e6 3d a0 ad 96 20 14 43 fc 83 5d
> > >>> 21
> > >> 08 78
> > >>> e8 85 69 a0 d2 e6 9a c9 a9
> > >>> 00e0: f6 96 66 ee 80 a6 06 a6 a6 ee cb 9b 7c e4 65 5f a5 0c 5a d9
> > >>> 5e
> > >> de 50
> > >>> d1 ab 73 8b c4 f7 3a f2 62
> > >>> 0100: 59 27 16 fa 42 1b e1 db 19 76 a8 40 06 25 d3 28 54 bf dd d4
> > >>> 75
> > >> 1e 4f
> > >>> 40 d0 c4 3e 1e 60 e7 4b 9b
> > >>> 0120: c9 c8 98 db a4 74 8f 86 39 ae 76 9c f9 c9 fe 63 ef 34 ab 4d
> > >>> 0b
> > >> 14 22
> > >>> d0 d6 9e a3 fd 12 ab c3 7c
> > >>> 0140: 61 fd ea 09 dc 2d ad 78 6e ce 13 2b 95 36 83 34 3a 1b ef d3
> > >>> fd
> > >> 07 de
> > >>> b2 df c7 7a 83 bd 6e ab 51
> > >>> 0160: 70 99 4e 28 07 de 63 42 ab 81 96 79 7f 30 27 28 4a 3e a1 8f
> > >>> 42
> > >> 5f 7d
> > >>> cd 8f ec 86 e0 ea 2b fb 05
> > >>> 0180: c2 ce ce 69 ae 4e 5c dd 95 85 11 23 a3 80 85 40 65 e3 a1 92
> > >>> 18
> > >> 9a dc
> > >>> 31 ac 13 24 a3 a9 b9 5c 95
> > >>> 01a0: f5 b5 b5 08 ee 7d d8 ff 44 42 77 c4 09 25 35 7c b4 0b 64 77
> > >>> ea
> > >> 74 19
> > >>> b7 b0 c1 04 6d 42 7e ab 32
> > >>> 01c0: 91 e5 b1 59 2d 60 31 11 5f 38 52 36 d0 ba c0 73 d5 fb 5c b6
> > >>> 82
> > >> a1
> > >>>
> > >>> I vaguely recall the running hash need for a challenge auth being
> > >> rather hard
> > >>> to get right but I had
> > >>> the advantage of being able to compare how both sides built it up.
> > >>>
> > >>> Jonathan
> > >>>
> > >>>
> > >>> Ah. Been a while, but IIRC correctly the spec doesn't make it
> > >>> clear when signatures should be ASN.1. My basis for choosing
> > >>> combinations in that code were what libSPDM did at the time. I
> > >> remember
> > >>> a bunch of trial and error and also hand decoding binary to try to
> > >>> figure out what the encodings were. I also enjoyed those places
> > >>> where various different ASN.1 encoded structures were concatenated
> > >>> rather that encoded in one go - hence no cheap way to index to the
> > >>> next one.
> > >>>
> > >>> I'm reviewing a nice short 972 page spec draft this week (which
> > >>> will
> > >> remain
> > >>> unnamed :) but if I get time I'll see if I can test that path
> > >>> before Tuesday.
> > >>>
> > >>> I think I ran basic tests on all the protocol types, but it was a
> > >> long
> > >>> time ago so possible I missed one.
> > >>>
> > >>> I meant to seek a spec clarification but haven't gotten around to
> > >>> it
> > >> yet.
> > >>> Request from DMTF people was to file tickets against he spec for
> > >> stuff
> > >>> like that.
> > >>>
> > >>> Jonathan
> > >>>
> > >>>
> > >>>
> > >>> Thanks,
> > >>> Lorenzo
> > >>>
> > >>> New Potential topic.
> > >>>
> > >>> Scheduler Tuneables from NUMA topology.
> > >>>
> > >>> This is yangyicong's topic but I'll attempt to summarize:
> > >>>
> > >>>
> > >>
> > >>
> https://lore.kernel.org/lkml/ef3b3e55-8be9-595f-6d54-886d13a7e2fd@h
> > >> isi
> > >> l
> > >>> icon.com/
> > >>>
> > >>> The scheduler contains a bunch of tunables including this one
> > >>> which
> > >> is
> > >>> "migration cost"
> > >>> This value is used to make decisions in load balancing + to
> > >>> control
> > >> the
> > >>> frequency of load balancing
> > >>> to avoid doing it too often. The default value has been fixed for
> > >>> a
> > >> long time
> > >>> and systems have changed a lot in that time.
> > >>>
> > >>> Currently the value is tunable via debugfs, but in the above
> > >>> thread
> > >> the
> > >>> proposal
> > >>> to somehow base the value on the system topology was made.
> > >>>
> > >>> We haven't yet proceeded very far with this but if we can get
> > >> appropriate
> > >>> people for
> > >>> the call it may be a good opportunity to do some brainstorming,
> > >> particularly
> > >>> as
> > >>> we don't have ready access to that many machine topologies so
> > >>> testing
> > >> any
> > >>> proposal
> > >>> will be very challenging. Also I fear this space is only going to
> > >>> get
> > >> more
> > >>> complex
> > >>> as systems get larger over the next year or two.
> > >>>
> > >>> Next week may be too soon for such a discussion though given the
> > >> short
> > >>> notice!
> > >>>
> > >>> +CC Vincent and Dietmar, but please drag anyone else in who is
> > >> relevant to
> > >>> this
> > >>> discussion.
> > >>>
> > >>> I might also mention this topic at the LDCG meeting this week to
> > >>> see
> > >> if we
> > >>> can
> > >>> interest from others who might be able to help with data + testing.
> > >>>
> > >>> Thanks,
> > >>>
> > >>> Jonathan
> > >>>
> > >>>
> > >>>
> > >>>
> > >>>
> > >>> 锟斤拷 2022锟斤拷4锟斤拷14锟秸ｏ拷锟斤拷锟斤拷8:00锟斤
> 拷
> > >>>
> > >>
> > >> linaro-open-discussions-request(a)op-lists.linaro.org<mailto:linaro-o
> > >> pen-
> > >> disc
> > >>> ussions-request(a)op-lists.linaro.org>写锟斤拷锟斤拷
> > >>>
> > >>> Send Linaro-open-discussions mailing list submissions to
> > >>>
> > >>
> > >> linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-disc
> > >> ussi
> > >> ons
> > >>> @op-lists.linaro.org>
> > >>>
> > >>> To subscribe or unsubscribe via email, send a message with subject
> > >>> or body 'help' to
> > >>>
> > >>
> > >> linaro-open-discussions-request(a)op-lists.linaro.org<mailto:linaro-o
> > >> pen-
> > >> disc
> > >>> ussions-request(a)op-lists.linaro.org>
> > >>>
> > >>> You can reach the person managing the list at
> > >>>
> > >>
> > >> linaro-open-discussions-owner(a)op-lists.linaro.org<mailto:linaro-ope
> > >> n-di
> > >> scu
> > >>> ssions-owner(a)op-lists.linaro.org>
> > >>>
> > >>> When replying, please edit your Subject line so it is more
> > >>> specific than "Re: Contents of Linaro-open-discussions digest..."
> > >>>
> > >>> Today's Topics:
> > >>>
> > >>> 1. Re: LOD Call notes: 22 March 2022 - vCPU Hotplug Update
> > >>> (Jonathan Cameron)
> > >>>
> > >>>
> > >>>
> > >>
> > >> -------------------------------------------------------------------
> > >> ---
> > >>>
> > >>> Message: 1
> > >>> Date: Wed, 13 Apr 2022 19:17:32 +0100
> > >>> From: Jonathan Cameron
> > >>>
> <Jonathan.Cameron(a)Huawei.com<mailto:Jonathan.Cameron@Huawei.com
> > >>>>>
> > >>> Subject: [Linaro-open-discussions] Re: LOD Call notes: 22 March
> > >>> 2022
> > >> -
> > >>> vCPU Hotplug Update
> > >>> To: Ilkka Koskinen
> > >>>
> <ilkka(a)os.amperecomputing.com<mailto:ilkka@os.amperecomputing.com>
> > >>>>
> > >>> Cc:
> > >>>
> > >>
> > >> linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-disc
> > >> ussi
> > >> ons
> > >>> @op-lists.linaro.org>
> > >>> Message-ID:
> > >>>
> <20220413191732.00000e4e(a)Huawei.com<mailto:20220413191732.0000
> > >>> 0e4e(a)Huawei.com>>
> > >>> Content-Type: text/plain; charset="US-ASCII"
> > >>>
> > >>> On Thu, 31 Mar 2022 11:47:26 -0700 (PDT) Ilkka Koskinen
> > >>>
> <ilkka(a)os.amperecomputing.com<mailto:ilkka@os.amperecomputing.com>
> > >>> >
> > >>> wrote:
> > >>>
> > >>> Hi everyone,
> > >>>
> > >>> On Tue, 22 Mar 2022, Jonathan Cameron via Linaro-open-discussions
> > >> wrote:
> > >>> Hi All,
> > >>>
> > >>> A quick set of notes on the discussion on vCPU hotplug.
> > >>>
> > >>> Great to have Ed join the discussion. If we are going to have
> > >>> further calls on this topic we may want to move the time to be
> > >>> more friendly for the US.
> > >>>
> > >>> Current status
> > >>> * ACPI spec change via code first route approved.
> > >>> * Kernel patches being reworked / rebased by ARM. Expected to be
> > >>> sent out in 5.19 cycle.
> > >>> * QEMU patches being updated by Huawei. Will do at least some
> > >>> light testing and then push out a public git tree so that others
> > >>> can test - will
> > >> aim
> > >>> to do this so it aligns with kernel code availability.
> > >>> * Ed (Ampere) gave an update to say they are interested in pushing
> > >> this
> > >>> forwards ASAP and have customer / OS vendor engagement which will
> > >>> be very useful in moving towards a complete solution, particularly
> > >> ensuring
> > >>> good test coverage etc.
> > >>>
> > >>> Noted that current QEMU patches may not cover all corner cases,
> > >>> for example live migration of VMs that have vCPUs hotplugged.
> > >>> Might 'just work'
> > >>> but we haven't tested it yet so probably not.
> > >>>
> > >>> Given we didn't really add anything on DOE / SPDM over previous
> > >> calls,
> > >>> I don't plan to send out anything on that topic this time.
> > >>>
> > >>> Thanks to Joyce for hosting the call. If I noted down anything
> > >> wrong,
> > >>> or incomplete let the list know.
> > >>>
> > >>> Jonathan
> > >>> --
> > >>> Linaro-open-discussions mailing list --
> > >>>
> > >>
> > >> linaro-open-discussions(a)op-lists.linaro.org<mailto:linaro-open-disc
> > >> ussi
> > >> ons
> > >>> @op-lists.linaro.org>
> > >>>
> > >>
> > >> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+
> > >> Hom
> > >> e
> > >>>
> > >>> Thanks for the great meeting and the update! As Ed mentioned (and
> > >>> you wrote above), we're interested in joining the vCPU Hotplug
> > >> development.
> > >>>
> > >>> Hi Ilkka
> > >>>
> > >>> Great to have you on board for this.
> > >>>
> > >>> Status wise, on QEMU side we have the new interface up and running
> > >>> (it was a whole 2 lines of code once we'd dealt with some rebasing
> > >> related
> > >>> issues).
> > >>>
> > >>> Rather more changes were needed to make it work sensibly on top of
> > >> Gavin
> > >>> Shan's
> > >>> QEMU topology configuration patch set.
> > >>>
> https://lore.kernel.org/qemu-devel/20220403145953.10522-1-gshan@re
> > >>> dh
> > >>> at.com/
> > >>> The code going through some light internal review before we put it
> > >>> up somewhere public. Note it's definitely not production quality
> > >>> code but it is
> > >> somewhere
> > >>> to start from. Given Easter related vacations I doubt we'll get
> > >> enough
> > >>> eyes on it until next week.
> > >>>
> > >>> We were thrown briefly by the fact there is a recently added
> > >>> apcica/actbl2.h entry for MADT_ONLINE_CAPABLE but it's a different
> > >> bit.
> > >>> Seems x86 folk wanted something similar last year. We'll have to
> > >>> do something ugly in ACPICA to mangle the name for the new bit to
> > >>> avoid that
> > >> collision.
> > >>> Lorenzo, I'm assuming the ACPCIA one line patch to add that define
> > >>> is something the ARM team will deal with?
> > >>>
> > >>> There are some known limitations though that we'll need to sort
> > >>> out
> > >> before
> > >>> upstreaming the QEMU support. One of which is SVE currently breaks
> > >> things.
> > >>> Plenty of time though as kernel needs to be upstream first anyway.
> > >>>
> > >>> Testing wise we are using QEMU on top of QEMU so we can poke
> > >>> corners
> > >> of
> > >>> the
> > >>> architecture don't have hardware for (e.g. SVE :). Even on a
> > >>> rubbish
> > >> x86
> > >>> desktop it's not that slow :)
> > >>>
> > >>> Lorenzo, any update on kernel side of things or expected time
> > >>> scale
> > >> for
> > >>> more information?
> > >>>
> > >>> Obviously we have some hacked patches based on Salil's original
> > >> proposal
> > >>> that sanity check the QEMU side of things but I suspect the final
> > >> version
> > >>> will look rather different :)
> > >>>
> > >>> One question on the spec change for Lorenzo. It's not entirely
> > >>> clear but I think we should not be using _MAT when 'hotplugging' the
> vCPUs?
> > >>> For now the QEMU code provides the relevant entries anyway but it
> > >>> would be nice to drop that if not necessary (it's not a huge
> > >>> amount of code or complexity though so not a big thing either way).
> > >>>
> > >>> Thanks and an early happy Easter to those celebrating on Sunday.
> > >>>
> > >>> Jonathan
> > >>>
> > >>>
> > >>> Br, Ilkka
> > >>>
> > >>>
> > >>> ------------------------------
> > >>>
> > >>> Subject: Digest Footer
> > >>>
> > >>> Linaro-open-discussions mailing list --
> > >>>
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> > >> ussi
> > >> ons
> > >>> @op-lists.linaro.org>
> > >>> To unsubscribe send an email to
> > >>>
> > >>
> > >> linaro-open-discussions-leave(a)op-lists.linaro.org<mailto:linaro-ope
> > >> n-di
> > >> scus
> > >>> sions-leave(a)op-lists.linaro.org>
> > >>>
> > >>>
> > >>> ------------------------------
> > >>>
> > >>> End of Linaro-open-discussions Digest, Vol 19, Issue 1
> > >>> ******************************************************
> > >>>
> > >>> --
> > >>> Linaro-open-discussions mailing list --
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> > >>>
> > >>
> > >> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+
> > >> Hom
> > >> e
> > >> --
> > >> Linaro-open-discussions mailing list --
> > >> linaro-open-discussions(a)op-lists.linaro.org
> > >> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+
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