Ok we have our usual timezone problem
How about one of the following?
10.00 am GMT December 3rd ?
3.00 pm GMT December 3rd ?
On Tue, Nov 24, 2020 at 1:13 AM Jammy Zhou via Linaro-open-discussions <
linaro-open-discussions(a)op-lists.linaro.org> wrote:
> Some earlier slots can be better for potential attendees from Asia in the
> early evening :-)
>
> Thanks,
> Jammy
>
> On Tue, 24 Nov 2020 at 02:25, Lorenzo Pieralisi via Linaro-open-discussions
> <linaro-open-discussions(a)op-lists.linaro.org> wrote:
>
> > On Mon, Nov 23, 2020 at 05:44:15PM +0000, Jonathan Cameron wrote:
> >
> > [...]
> >
> > > > > If possible 3PM GMT works
> > > > > better for me;
> > > >
> > > >
> > > > Linaro has a standing internal meeting with its members at 3.00 pm on
> > > > December 2nd, how is 4.30 pm GMT or retain the 2.00 pm slot?
> > >
> > > I have another call at 4.30 but any time before that works for me.
> > > If that's a problem for Lorenzo, perhaps we can shift the day slightly
> > > or go earlier in the day?
> >
> > The only slot I can in the afternoon is 3PM to 5PM on Wednesdays.
> >
> > Morning it is perfectly fine but it may be too early for some people.
> >
> > 2PM I really can't make it I am sorry. Maybe we can try in the morning ?
> >
> > Please let me know, thanks a lot,
> > Lorenzo
> >
> > > > > the NUMA topic raised by Jonathan is another interesting
> > > > > topic for debate. Other than that we can slot in the topics that
> > > > > weren't discussed last time:
> > > > >
> > > > >
> > https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> > > > >
> > > > > even though those require a bit of preparation so the sooner we
> > finalize
> > > > > the schedule the better.
> > > > >
> > > > > Please let me know, thanks.
> > > > >
> > > >
> > > > I think we should prepare any topic slides and have the call, does
> > anyone
> > > > have any additional agenda items?
> > >
> > > I'll chase up our end over the next few days,
> > >
> > > Thanks,
> > >
> > > Jonathan
> > >
> > > >
> > > >
> > > > >
> > > > > Lorenzo
> > > > >
> > > > > > * DT alignment. Don't want different solutions for each firmware
> > type.
> > > > > > * Lorenzo / Sami to check IORT revision E is final.
> > > > > >
> > > > > > SVA
> > > > > > ===
> > > > > >
> > > > > > Zangfei gave summary:
> > > > > > - Huawei has devices that are not PCIe but are presented as
> such.
> > > > > > - They support stall mode for SVA (spec violation)
> > > > > > - Resistance from kernel maintainers to maintaining a white list
> > for
> > > > > any quirk. Fine to fix
> > > > > > it once (JPB), but not to keep doing so.
> > > > > > - Note that stall mode not yet supported at all (JPB to send out
> > this
> > > > > cycle).
> > > > > > - If longer term fix need add can't be done via PCISIG etc then
> > need to
> > > > > convince
> > > > > > PCI and SMMU maintainers. Noted that quirk is very little
> > code.
> > > > > >
> > > > > > * Other SVA topics.
> > > > > > - Mentioned virtual SVA (no actually problems just expressing
> > > > > interest!)
> > > > > > - Would need Eric Auger, wasn't on topic list so Eric not on
> > call.
> > > > > >
> > > > > > AI: Nothing planned until after JPB has upstreamed stall mode.
> > Hard to
> > > > > have discussion before that.
> > > > > >
> > > > > > DVFS
> > > > > > ====
> > > > > >
> > > > > > guohanjun
> > > > > >
> > > > > > Solutions exist for
> > > > > > * CPU DVFS (voltage + frequency scaling)
> > > > > > * PCIe device power states etc
> > > > > >
> > > > > > No standard way of controlling Uncore voltage and frequency for
> > ACPI
> > > > > based systems.
> > > > > >
> > > > > > 3 options:
> > > > > > 1. MMIO / kernel driver.
> > > > > > 2. PSCI via trusted firmware and system management controller.
> > > > > > 3. ACPI (wrapping up an op region and SCMI)
> > > > > >
> > > > > > Clarifications / discussions.
> > > > > > * Vincent G: Power states, or voltage frequency of interest? Ans
> > > > > Voltage Freq
> > > > > > * Considered SCMI? Ans: Works only for DT as SCMI under ACPI is
> > > > > wrapped up in AML
> > > > > > so looks like an ACPI interface.
> > > > > > * Sudeep H: Necessary to trace CPU freq? Yes.
> > > > > > * Sudeep H: Why not do it in firmware entirely? Ans. Not just
> > CPU.
> > > > > For example PCI device accessing
> > > > > > memory may well need the ring bus to be fast.
> > > > > > * Vincent G: Bandwidth affected? Yes. VG: mobile does this by
> > > > > specifying a BW requirement (via SCMI.-
> > > > > > * Sudeep H Observed need to expose it via ACPI spec. (option 3
> > above).
> > > > > > * Sudeep H: Does PCI also need fine-grain control? We might need
> > to add
> > > > > to the spec.
> > > > > > * Sudeep H: What are the requirements? gaohanjun: Now we just
> > > > > frequency scaling.
> > > > > > * Jonathan C: Noted PCI power state is not enough. It's
> > workload
> > > > > dependent.
> > > > > > * Sudeep H: We need to gather all the info, need to talk in ASWG
> > about
> > > > > DVFS
> > > > > > * Jonathan C: For now direct control probably makes sense.
> > Whilst it
> > > > > would be nice to have
> > > > > > a detailed enough system description in a standard way to make
> > > > > general software that is a
> > > > > > big spec job.
> > > > > > * Jonathan C: Seems like true standard SW will not happen any
> > time soon.
> > > > > >
> > > > > > AI: RFC to the linux-pm / linux-acpi Rafael and those in this
> > discussion
> > > > > to ask about
> > > > > > interest in adding per device DVFS to ACPI spec. Possibly
> > pursue
> > > > > code first ACPI
> > > > > > approach.
> > > > > >
> > > > > > If I've miss listed or "volunteered" anyone for AIs they didn't
> > agree to
> > > > > then please
> > > > > > correct that.
> > > > > >
> > > > > > Thanks all for contributions. I for one found it a very useful
> > call!
> > > > > >
> > > > > > Jonathan
> > > > > >
> > > > > >
> > > > > > --
> > > > > > Linaro-open-discussions mailing list
> > > > > >
> > https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> > > > > >
> > https://op-lists.linaro.org/mailman/listinfo/linaro-open-discussions
> > > > > --
> > > > > Linaro-open-discussions mailing list
> > > > >
> > https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> > > > >
> https://op-lists.linaro.org/mailman/listinfo/linaro-open-discussions
> > > > >
> > > >
> > > >
> > >
> > --
> > Linaro-open-discussions mailing list
> > https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> > https://op-lists.linaro.org/mailman/listinfo/linaro-open-discussions
> >
> --
> Linaro-open-discussions mailing list
> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> https://op-lists.linaro.org/mailman/listinfo/linaro-open-discussions
>
--
Mike Holmes | Director, Foundation Technologies, Linaro
Mike.Holmes(a)linaro.org <mike.holmes(a)linaro.org>
"Work should be fun and collaborative, the rest follows"
Some earlier slots can be better for potential attendees from Asia in the
early evening :-)
Thanks,
Jammy
On Tue, 24 Nov 2020 at 02:25, Lorenzo Pieralisi via Linaro-open-discussions
<linaro-open-discussions(a)op-lists.linaro.org> wrote:
> On Mon, Nov 23, 2020 at 05:44:15PM +0000, Jonathan Cameron wrote:
>
> [...]
>
> > > > If possible 3PM GMT works
> > > > better for me;
> > >
> > >
> > > Linaro has a standing internal meeting with its members at 3.00 pm on
> > > December 2nd, how is 4.30 pm GMT or retain the 2.00 pm slot?
> >
> > I have another call at 4.30 but any time before that works for me.
> > If that's a problem for Lorenzo, perhaps we can shift the day slightly
> > or go earlier in the day?
>
> The only slot I can in the afternoon is 3PM to 5PM on Wednesdays.
>
> Morning it is perfectly fine but it may be too early for some people.
>
> 2PM I really can't make it I am sorry. Maybe we can try in the morning ?
>
> Please let me know, thanks a lot,
> Lorenzo
>
> > > > the NUMA topic raised by Jonathan is another interesting
> > > > topic for debate. Other than that we can slot in the topics that
> > > > weren't discussed last time:
> > > >
> > > >
> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> > > >
> > > > even though those require a bit of preparation so the sooner we
> finalize
> > > > the schedule the better.
> > > >
> > > > Please let me know, thanks.
> > > >
> > >
> > > I think we should prepare any topic slides and have the call, does
> anyone
> > > have any additional agenda items?
> >
> > I'll chase up our end over the next few days,
> >
> > Thanks,
> >
> > Jonathan
> >
> > >
> > >
> > > >
> > > > Lorenzo
> > > >
> > > > > * DT alignment. Don't want different solutions for each firmware
> type.
> > > > > * Lorenzo / Sami to check IORT revision E is final.
> > > > >
> > > > > SVA
> > > > > ===
> > > > >
> > > > > Zangfei gave summary:
> > > > > - Huawei has devices that are not PCIe but are presented as such.
> > > > > - They support stall mode for SVA (spec violation)
> > > > > - Resistance from kernel maintainers to maintaining a white list
> for
> > > > any quirk. Fine to fix
> > > > > it once (JPB), but not to keep doing so.
> > > > > - Note that stall mode not yet supported at all (JPB to send out
> this
> > > > cycle).
> > > > > - If longer term fix need add can't be done via PCISIG etc then
> need to
> > > > convince
> > > > > PCI and SMMU maintainers. Noted that quirk is very little
> code.
> > > > >
> > > > > * Other SVA topics.
> > > > > - Mentioned virtual SVA (no actually problems just expressing
> > > > interest!)
> > > > > - Would need Eric Auger, wasn't on topic list so Eric not on
> call.
> > > > >
> > > > > AI: Nothing planned until after JPB has upstreamed stall mode.
> Hard to
> > > > have discussion before that.
> > > > >
> > > > > DVFS
> > > > > ====
> > > > >
> > > > > guohanjun
> > > > >
> > > > > Solutions exist for
> > > > > * CPU DVFS (voltage + frequency scaling)
> > > > > * PCIe device power states etc
> > > > >
> > > > > No standard way of controlling Uncore voltage and frequency for
> ACPI
> > > > based systems.
> > > > >
> > > > > 3 options:
> > > > > 1. MMIO / kernel driver.
> > > > > 2. PSCI via trusted firmware and system management controller.
> > > > > 3. ACPI (wrapping up an op region and SCMI)
> > > > >
> > > > > Clarifications / discussions.
> > > > > * Vincent G: Power states, or voltage frequency of interest? Ans
> > > > Voltage Freq
> > > > > * Considered SCMI? Ans: Works only for DT as SCMI under ACPI is
> > > > wrapped up in AML
> > > > > so looks like an ACPI interface.
> > > > > * Sudeep H: Necessary to trace CPU freq? Yes.
> > > > > * Sudeep H: Why not do it in firmware entirely? Ans. Not just
> CPU.
> > > > For example PCI device accessing
> > > > > memory may well need the ring bus to be fast.
> > > > > * Vincent G: Bandwidth affected? Yes. VG: mobile does this by
> > > > specifying a BW requirement (via SCMI.-
> > > > > * Sudeep H Observed need to expose it via ACPI spec. (option 3
> above).
> > > > > * Sudeep H: Does PCI also need fine-grain control? We might need
> to add
> > > > to the spec.
> > > > > * Sudeep H: What are the requirements? gaohanjun: Now we just
> > > > frequency scaling.
> > > > > * Jonathan C: Noted PCI power state is not enough. It's
> workload
> > > > dependent.
> > > > > * Sudeep H: We need to gather all the info, need to talk in ASWG
> about
> > > > DVFS
> > > > > * Jonathan C: For now direct control probably makes sense.
> Whilst it
> > > > would be nice to have
> > > > > a detailed enough system description in a standard way to make
> > > > general software that is a
> > > > > big spec job.
> > > > > * Jonathan C: Seems like true standard SW will not happen any
> time soon.
> > > > >
> > > > > AI: RFC to the linux-pm / linux-acpi Rafael and those in this
> discussion
> > > > to ask about
> > > > > interest in adding per device DVFS to ACPI spec. Possibly
> pursue
> > > > code first ACPI
> > > > > approach.
> > > > >
> > > > > If I've miss listed or "volunteered" anyone for AIs they didn't
> agree to
> > > > then please
> > > > > correct that.
> > > > >
> > > > > Thanks all for contributions. I for one found it a very useful
> call!
> > > > >
> > > > > Jonathan
> > > > >
> > > > >
> > > > > --
> > > > > Linaro-open-discussions mailing list
> > > > >
> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> > > > >
> https://op-lists.linaro.org/mailman/listinfo/linaro-open-discussions
> > > > --
> > > > Linaro-open-discussions mailing list
> > > >
> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> > > > https://op-lists.linaro.org/mailman/listinfo/linaro-open-discussions
> > > >
> > >
> > >
> >
> --
> Linaro-open-discussions mailing list
> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> https://op-lists.linaro.org/mailman/listinfo/linaro-open-discussions
>
On Mon, Nov 23, 2020 at 3:13 PM Lorenzo Pieralisi via
Linaro-open-discussions <linaro-open-discussions(a)op-lists.linaro.org> wrote:
> On Thu, Nov 05, 2020 at 12:36:21PM +0000, Jonathan Cameron via
> Linaro-open-discussions wrote:
> >
> > Hi all,
> >
> > This is a fusion of Mike's notes and my own. Please add anything I
> missed!
> > People may well be misidentified (sorry about that). Was very good
> active discussion.
> > Thanks to all involved and Mike in particular for organizing it and
> taking live notes.
> >
> > General request
> >
> > - Slides for all topics next time to introduce topics as not everyone
> on call will have necessary
> > background (and those that do might need reminding!)
> > Hanjun is sending Mike his slides (uncore DVFS) to add to the
> collaborate page.
> >
> > IORT - Reserve memory regions (RMR)
> > ===================================
> >
> > * Shameer gave summary
> > - IORT Revision E (
> https://developer.arm.com/documentation/den0049/latest/) introduced new
> node type.
> > - A way to describe memory regions that should have unity mapping in
> the SMMU.
> > - Use case is a PCIe RAID card that has FW that uses a pool of host
> memory (hidden from OS).
> >
> > * Status
> > - Patches out for ACPICA
> > - Question raised by ACPICA reviewers on whether spec is final
> > - Spec appears final (Lorenzo to check) but may be minor unrelated
> fix in doc to come (Sami).
> > - Patches out for kernel on relevant lists.
> > - Mail from Steven Price (Arm) - (Sami Mujawar who was on the call
> also involved) interested for EFI
> > framebuffer use case.
> >
> > * Open questions
> > - Equivalent from AMD has flag to indicate that unity mapping only
> needed until driver has taken over
> > (end of kernel boot assumed). Avoids and issue of holes in address
> space for VMs.
> > - Huawei not raising this as a requirement, but Lorenzo observed
> interesting and deserves discussion.
> > - Kexec interaction needs discussions. Steve looking at this an will
> bring to list.
> > - Lorenzo brought up issue of IORT spec using PCI BDF (stream ID?)
> which may be reenumerated.
> > - Noted x86 doesn't do this but ARM traditionally does.
> > - There is a DSM that tells the kernel not to reenumerate the PCI bus
> which ACPI obeys.
> > - Jonathan suggestion was potentially opportunity to cache original
> stream ID before doing the
> > reenumeration in kernel.
> > - Lorenzo observed we may need a universal solution for all OSes on
> this.
> > Lorenzo took AI to go away and think about it before next call.
> > - Stalling issues on patch? Probably only Kexec though should be
> careful around possible future
> > regressions on the BDF issue (not a blocker)
> > - Related DT story. Huawei server team not interested as no DT support
> and can't test.
> > Lorenzo suggested looping in Thierry Reding and reference a patch set
> > (probably
> https://lore.kernel.org/linux-iommu/20200904130000.691933-1-thierry.reding@…
> )
> > Huawei more than happy to have others add the DT support :)
> >
> > AI summary:
> > * Kexec discussion - on list.
> > * Use of BDF discussion - revisit here next time.
>
> I have an update on this topic and the RMR flags to free up IOVA.
>
> Is December 2nd confirmed as next session ?
It is if we have an agenda, which we now do, I added your topic as
confirmed.
> If possible 3PM GMT works
> better for me;
Linaro has a standing internal meeting with its members at 3.00 pm on
December 2nd, how is 4.30 pm GMT or retain the 2.00 pm slot?
> the NUMA topic raised by Jonathan is another interesting
> topic for debate. Other than that we can slot in the topics that
> weren't discussed last time:
>
> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
>
> even though those require a bit of preparation so the sooner we finalize
> the schedule the better.
>
> Please let me know, thanks.
>
I think we should prepare any topic slides and have the call, does anyone
have any additional agenda items?
>
> Lorenzo
>
> > * DT alignment. Don't want different solutions for each firmware type.
> > * Lorenzo / Sami to check IORT revision E is final.
> >
> > SVA
> > ===
> >
> > Zangfei gave summary:
> > - Huawei has devices that are not PCIe but are presented as such.
> > - They support stall mode for SVA (spec violation)
> > - Resistance from kernel maintainers to maintaining a white list for
> any quirk. Fine to fix
> > it once (JPB), but not to keep doing so.
> > - Note that stall mode not yet supported at all (JPB to send out this
> cycle).
> > - If longer term fix need add can't be done via PCISIG etc then need to
> convince
> > PCI and SMMU maintainers. Noted that quirk is very little code.
> >
> > * Other SVA topics.
> > - Mentioned virtual SVA (no actually problems just expressing
> interest!)
> > - Would need Eric Auger, wasn't on topic list so Eric not on call.
> >
> > AI: Nothing planned until after JPB has upstreamed stall mode. Hard to
> have discussion before that.
> >
> > DVFS
> > ====
> >
> > guohanjun
> >
> > Solutions exist for
> > * CPU DVFS (voltage + frequency scaling)
> > * PCIe device power states etc
> >
> > No standard way of controlling Uncore voltage and frequency for ACPI
> based systems.
> >
> > 3 options:
> > 1. MMIO / kernel driver.
> > 2. PSCI via trusted firmware and system management controller.
> > 3. ACPI (wrapping up an op region and SCMI)
> >
> > Clarifications / discussions.
> > * Vincent G: Power states, or voltage frequency of interest? Ans
> Voltage Freq
> > * Considered SCMI? Ans: Works only for DT as SCMI under ACPI is
> wrapped up in AML
> > so looks like an ACPI interface.
> > * Sudeep H: Necessary to trace CPU freq? Yes.
> > * Sudeep H: Why not do it in firmware entirely? Ans. Not just CPU.
> For example PCI device accessing
> > memory may well need the ring bus to be fast.
> > * Vincent G: Bandwidth affected? Yes. VG: mobile does this by
> specifying a BW requirement (via SCMI.-
> > * Sudeep H Observed need to expose it via ACPI spec. (option 3 above).
> > * Sudeep H: Does PCI also need fine-grain control? We might need to add
> to the spec.
> > * Sudeep H: What are the requirements? gaohanjun: Now we just
> frequency scaling.
> > * Jonathan C: Noted PCI power state is not enough. It's workload
> dependent.
> > * Sudeep H: We need to gather all the info, need to talk in ASWG about
> DVFS
> > * Jonathan C: For now direct control probably makes sense. Whilst it
> would be nice to have
> > a detailed enough system description in a standard way to make
> general software that is a
> > big spec job.
> > * Jonathan C: Seems like true standard SW will not happen any time soon.
> >
> > AI: RFC to the linux-pm / linux-acpi Rafael and those in this discussion
> to ask about
> > interest in adding per device DVFS to ACPI spec. Possibly pursue
> code first ACPI
> > approach.
> >
> > If I've miss listed or "volunteered" anyone for AIs they didn't agree to
> then please
> > correct that.
> >
> > Thanks all for contributions. I for one found it a very useful call!
> >
> > Jonathan
> >
> >
> > --
> > Linaro-open-discussions mailing list
> > https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> > https://op-lists.linaro.org/mailman/listinfo/linaro-open-discussions
> --
> Linaro-open-discussions mailing list
> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> https://op-lists.linaro.org/mailman/listinfo/linaro-open-discussions
>
--
Mike Holmes | Director, Foundation Technologies, Linaro
Mike.Holmes(a)linaro.org <mike.holmes(a)linaro.org>
"Work should be fun and collaborative, the rest follows"
Hi,
Below are some meeting minutes for the meeting yesterday.
Attendees:
- openEuler: Fengguang, Kaitian
- Huawei: Nan, Jonathan, Jerome
- Linaro: Milosz, Anmar, Ryan, Yongqin, Jammy
Notes:
- Fengguang did some introduction about CompassCI testing framework
- Fengguang summarized the major benefits of LAVA/LKFT to CompassCI
- LAVA dispatcher can support many device types
- LKFT test definitions can be wrapped in lkp_tests (both lkp jobs
and lava jobs are in YAML format)
- Anmar asked if we can wrap lkp tests in LKFT, which is also possible
according to Fengguang. But Fengguang's recommendation is to wrap LKFT in
lkp, because LAVA has some limitations to support the data model of
CompassCI.
- Anmar asked the database support in CompassCI, and Fengguang shared
that ElasticSearch is used now as the database backend to store data
- Yongqin asked if there is any plan to support Android by CompassCI.
There is no active plan at this moment, and since CompassCI is part of
openEuler community, the server OS is the focus now.
- The reports for Android Common Kernel testing can be found at [1]
- The lkq-dev mailing list [2] can be used for further discussions.
[1] https://qa-reports.linaro.org/android-lkft/
[2] https://op-lists.linaro.org/mailman/listinfo/lkq-dev
Regards,
Jammy
On Sun, 15 Nov 2020 at 13:19, Jammy Zhou via Lkq-dev <
lkq-dev(a)op-lists.linaro.org> wrote:
> Hi All,
>
> CompassCI [1] is a new CI testing framework being worked on by the
> openEuler community, and the implementation is available in gitee repo [2].
>
> We're going to have a conference call to discuss the potential
> collaborations between CompassCI and LAVA/LKFT. The tech leader of
> CompassCI will do some introduction about CompassCI and present their ideas
> about integrating LAVA/LKFT with CompassCI. Below is the meeting info and
> welcome to join.
>
> Topic: Compass-CI and LAVA/LKFT sync
> Time: Nov 17, 2020 09:00 PM Hong Kong SAR (UTC +8)
>
> Join Zoom Meeting
> https://linaro-org.zoom.com.cn/j/97479537073
>
> Meeting ID: 974 7953 7073
> One tap mobile
> +16699009128,,97479537073# US (San Jose)
> +12532158782,,97479537073# US (Tacoma)
>
> Dial by your location
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> Find your local number: https://linaro-org.zoom.com.cn/u/aFYmaUrqs
>
> [1] https://compass-ci.openeuler.org/
> [2] https://gitee.com/openeuler/compass-ci
>
> Regards,
> Jammy
> --
> Lkq-dev mailing list
> Lkq-dev(a)op-lists.linaro.org
> https://op-lists.linaro.org/mailman/listinfo/lkq-dev
>
Hi Ulf,
Sorry for the late reply, please see my comments inline.
On 2020/11/6 22:37, Ulf Hansson via Linaro-open-discussions wrote:
> On Fri, 6 Nov 2020 at 09:53, Mike Holmes via Linaro-open-discussions
> <linaro-open-discussions(a)op-lists.linaro.org> wrote:
>> All
>>
>> Thanks for a good discussion yesterday, Hanjun's Unconre DVFS slides are
>> now attached to the notes at
>> https://collaborate.linaro.org/display/LOD/2020-11-04+Meeting+Meeting+notes
> Just to make sure people know about it...
>
> For DT based platforms we have recently enabled a generic solution in
> the Linux kernel to support DVFS. From a top level point of view, it
> consists of letting a power-domain provider act as the backend driver
> for changing the performance state (voltage/frequency). The mapping of
> what state to select, is done through OPP tables.
>
> I am not an expert of ACPI specifications, but perhaps the DT bindings
> can be used as inspiration for what is missing!?
Could you point me to the patches or documentation?
Thanks
Hanjun
Hi All,
CompassCI [1] is a new CI testing framework being worked on by the
openEuler community, and the implementation is available in gitee repo [2].
We're going to have a conference call to discuss the potential
collaborations between CompassCI and LAVA/LKFT. The tech leader of
CompassCI will do some introduction about CompassCI and present their ideas
about integrating LAVA/LKFT with CompassCI. Below is the meeting info and
welcome to join.
Topic: Compass-CI and LAVA/LKFT sync
Time: Nov 17, 2020 09:00 PM Hong Kong SAR (UTC +8)
Join Zoom Meeting
https://linaro-org.zoom.com.cn/j/97479537073
Meeting ID: 974 7953 7073
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[1] https://compass-ci.openeuler.org/
[2] https://gitee.com/openeuler/compass-ci
Regards,
Jammy
On Wed, Nov 04, 2020 at 01:23:43PM +0000, Jonathan Cameron via Linaro-open-discussions wrote:
> Hi All,
>
> This one made it onto the list of topics to discuss (now marked as no need
> to discuss). I've been meaning to give a status update by email including
> what is outstanding here. Please let me know if this fails to cover
> some aspect of interest.
>
> Background:
>
> https://github.com/hisilicon/acpi-numa-whitepaper/releases/tag/v0.93 chapter 3.
>
> Generic initiators are a concept in ACPI 6.3 (sec 5.2.16.6) to plug a hole
> in the definition of proximity domains.
>
> Proximity domains in ACPI (NUMA nodes in kernel) are defined by entries in SRAT
> table. There are a whole range of different types of SRAT entry but before
> ACPI 6.3 this more or less in practice meant that a proximity domain only
> existed if it contained either (or both) memory and CPUs. Other initiators
> of memory transactions such as network cards can be assigned to an existing
> proximity domain via _PXM in ACPI DSDT. This restricted them to sharing a domain
> with either memory or processors.
>
> That doesn't always reflect system architecture, particularly with the addition
> of richer descriptions of access characteristics (latency / bandwidth) brought
> in by HMAT. Hence Generic Initiator domains to allow you to specify a
> proximity domain with some other type of device in it (such as a network card)
> and get all of the descriptive capability available for CPU / memory nodes.
>
> Note that this was brought in prior to CXL becoming public but 1.1 CXL spec
> states that initiators on CXL should be described using Generic Initiator nodes.
> This should accelerate the number of users of this feature considerably.
> It is also useful in some existing systems.
>
> What support was needed in kernel:
>
> 1) Parsing of the SRAT Generic Initiator Affinity Structure
> 2) Instantiating the NUMA nodes that map to the GI PXM nodes to ensure stuff
> like fallback lists for memory allocation work as normal.
> 3) Richer use of HMAT access characteristics to differentiate nearest CPU
> to memory from nearest initiator to memory.
> 4) PXM assignment from the SRAT record rather than _PXM (not yet done).
> 5) PCI PXM assignment (not yet done)
>
> Status:
>
> The kernel patches sat on the list (with rebases) for well over a year
> failing to get the architecture review needed (as there was significant
> risk of breakage in both ARM64 and x86). It was to break this blockage
> that we were interested in an open discussion on this. However, they did
> recently get x86 review this and Rafael queued them for 5.10 (now merged)
>
> The PCI PXM issue has been long standing due to some buggy firmware
> on certain X86 boards and the need for a clarification in the ACPI spec
> (added in 6.3). To make this safe, needed to ensure that NUMA nodes on
> ACPI systems can only be instantiated during the main parse of SRAT.
>
> https://lore.kernel.org/linux-mm/20200818142430.1156547-1-Jonathan.Cameron@…
>
> That fix is now in place, and we'll resend the PCI fix shortly.
Overall, this is a topic to be discussed since it is important.
Shorter term, I need to pick your brain on this:
1) The series above, it should fix this issue:
https://lore.kernel.org/lkml/26284ca5-ea05-0496-629d-9951f49dda8f@linux.ali…
Correct ?
2) Why in dummy_numa_init() (arch/arm64/mm/numa.c) we don't turn
numa_off == true if numa_add_memblk() fails ?
(Side note: I really like the comment :) "...It is unlikely that this
function fails."
Forgive me for not looking earlier into the series above that Rafael
merged - as I said above this deserves more attention on my side.
Thanks,
Lorenzo
> Note it may be "interesting" to support nodes from CXL CDAT tables at runtime
> but that is another topic.
> ( https://uefi.org/node/4093https://lore.kernel.org/linux-cxl/20201102183428.00005f4f@Huawei.com/T/#m52… )
>
> For a Generic Initiator Nodes, there are two ways a device an be assigned
> to the proximity domain. Conventional _PXM in DSDT can be used and
> that is now supported. The SRAT entry itself also contains an address
> (PCI seg + BDF or Platform UID / HID based). There is no obligation to
> provide both. The SRAT based method will require some level of alternative
> infrastructure to that used for _PXM. We may look at this at some stage.
>
> So a few outstanding things but probably not worth discussing on a call
> at this stage unless anyone is seeing problems with the stuff already merged.
>
> Thanks,
>
> Jonathan
> --
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> https://collaborate.linaro.org/display/LOD/Linaro+Open+Discussions+Home
> https://op-lists.linaro.org/mailman/listinfo/linaro-open-discussions
Hi all,
As previously announced we are hosting a kickoff meeting for the above
topic/project.
The meeting has been added to the linaro-open-discussions calendar,
according to the below. Feel free to join us on Thursday this week!
Kind regards
Ulf Hansson, Linaro KWG
When:
Thursday Nov 12, 16:00-17:00 CET.
Agenda:
1. Introduction.
2. Update of the current support in Linux.
3. Collaborations.
4. Technical things.
5. Other matters.
To join the Zoom Meeting:
https://linaro-org.zoom.us/j/97261221687
Meeting ID: 972 6122 1687
One tap mobile
+13462487799,,97261221687# US (Houston)
+16465588656,,97261221687# US (New York)
Dial by your location
+1 346 248 7799 US (Houston)
+1 646 558 8656 US (New York)
+1 669 900 9128 US (San Jose)
+1 253 215 8782 US (Tacoma)
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+1 312 626 6799 US (Chicago)
Meeting ID: 972 6122 1687
Find your local number: https://linaro-org.zoom.us/u/acg3UrpmdE
Hi All
We have an interesting call this week with input from Huawei, Windriver and
a discussion on the use of Greybus to solve the i2c, SPI and GPIO
virtualization cases.
- Salil Mehta - discussion on Huawei's interest in the Stratos project
- Dan Milea, Josh Pincus - OpenAMP App-services topics from WindRiver
- A couple of slides on Immediate goals, some research, some results,
and then immediate next steps
- Notes from recent presentations here
https://github.com/OpenAMP/open-amp/wiki/OpenAMP-Application-Services-Subgr…
- Viresh, Alex Elder, Bill Mills Greybus as a solution for I2C, SPI
and GPIO
------
Project Stratos Sync
Home page: https://collaborate.linaro.org/display/STR/Stratos+Home
<https://collaborate.linaro.org/display/STR/Stratos+Home>
Virtual meeting: meet.google.com/uak-yrcj-tyd
Thursday, 12 November⋅3:00 – 4:00 pm GMT
Every 2 weeks on Thursday
Mike
--
Mike Holmes | Director, Foundation Technologies, Linaro
Mike.Holmes(a)linaro.org <mike.holmes(a)linaro.org>
"Work should be fun and collaborative, the rest follows"
On Fri, 6 Nov 2020 at 09:53, Mike Holmes via Linaro-open-discussions
<linaro-open-discussions(a)op-lists.linaro.org> wrote:
>
> All
>
> Thanks for a good discussion yesterday, Hanjun's Unconre DVFS slides are
> now attached to the notes at
> https://collaborate.linaro.org/display/LOD/2020-11-04+Meeting+Meeting+notes
Just to make sure people know about it...
For DT based platforms we have recently enabled a generic solution in
the Linux kernel to support DVFS. From a top level point of view, it
consists of letting a power-domain provider act as the backend driver
for changing the performance state (voltage/frequency). The mapping of
what state to select, is done through OPP tables.
I am not an expert of ACPI specifications, but perhaps the DT bindings
can be used as inspiration for what is missing!?
[...]
Kind regards
Ulf Hansson, Linaro KWG