Hello!
v0.1? Yeah, this is v0 from gitlab, rebased onto v6.0-rc3.
This series has only been lightly tested....
---
Hello!
This series adds what looks like cpuhotplug support to arm64 for use in
virtual machines. It does this by moving the cpu_register() calls for
architectures that support ACPI out of the arch code by using
GENERIC_CPU_DEVICES, then into the ACPI processor driver.
The kubernetes folk really want to be able to add CPUs to an existing VM,
in exactly the same way they do on x86. The use-case is pre-booting guests
with one CPU, then adding the number that were actually needed when the
workload is provisioned.
Wait? Doesn't arm64 support cpuhotplug already!?
In the arm world, cpuhotplug gets used to mean removing the power from a CPU.
The CPU is offline, and remains present. For x86, and ACPI, cpuhotplug
has the additional step of physically removing the CPU, so that it isn't
present anymore.
Arm64 doesn't support this, and can't support it: CPUs are really a slice
of the SoC, and there is not enough information in the existing ACPI tables
to describe which bits of the slice also got removed. Without a reference
machine adding this support to the spec is a wild goose chase.
Critically: everything described in the firmware tables must remain present.
For a virtual machine this is easy as all the other bits of 'virtual SoC'
are emulated, so they can (and do) remain present when a vCPU is 'removed'.
On a system that supports cpuhotplug the MADT has to describe every possible
CPU at boot. Under KVM, the vGIC needs to know about every possible vCPU before
the guest is started.
With these constraints, virtual-cpuhotplug is really just a hypervisor/firmware
policy about which CPUs can be brought online.
This series adds support for virtual-cpuhotplug as exactly that: firmware
policy. This may even work on a physical machine too; for a guest the part of
firmware is played by the VMM. (typically Qemu).
PSCI support is modified to return 'DENIED' if the CPU can't be brought
online/enabled yet. The CPU object's _STA method's enabled bit is used to
indicate firmware's current disposition. If the CPU has its enabled bit clear,
it will not be registered with sysfs, and attempts to bring it online will
fail. The notifications that _STA has changed its value then work in the same
way, and firmware can cause the CPU to be registered some time later, allowing
it to be brought online.
This creates something that looks like cpuhotplug to user-space, as the sysfs
files appear and disappear, and the udev notifications look the same.
One notable difference is the CPU present mask, which is exposed via sysfs.
Because the CPUs remain present throughout, they can still be seen in that mask.
This value does get used by webbrowsers to estimate the number of CPUs
as the CPU online mask is constantly changed on mobile phones.
Linux is tolerant of PSCI returning errors, as its always been allowed to do
that. To avoid confusing OS that can't tolerate this, we'd need an additional
bit in the MADT GICC flags. This series copies ACPI_MADT_ONLINE_CAPABLE, which
appears to be for this purpose, but calls it ACPI_MADT_GICC_CPU_CAPABLE as it
has a different bit position in the GICC.
I assume all x86 firmware vendors set the ENABLED bit in the CPU object's _STA
method. This code is unconditionally enabled for all ACPI architectures.
If there are problems with firmware tables on some devices, the CPUs will
already be online by the time the acpi_processor_make_enabled() is called.
A mismatch here causes a firmware-bug message and kernel taint. This should
only affect people with broken firmware who also boot with maxcpus=1, and
bring CPUs online later.
I had a go at switching the remaining architectures over to GENERIC_CPU_DEVICES,
so that the Kconfig symbol can be removed, but I got stuck with powerpc
and s390.
Thanks,
James Morse (22):
ACPI: Move ACPI_HOTPLUG_CPU to be enabled per architecture
drivers: base: Use present CPUs in GENERIC_CPU_DEVICES
drivers: base: Allow parts of GENERIC_CPU_DEVICES to be overridden
drivers: base: Move node_dev_init() before cpu_dev_init()
arm64: setup: Switch over to GENERIC_CPU_DEVICES using
arch_register_cpu()
ia64/topology: Switch over to GENERIC_CPU_DEVICES
x86/topology: Switch over to GENERIC_CPU_DEVICES
LoongArch: Switch over to GENERIC_CPU_DEVICES
ACPI: processor: Register all CPUs from acpi_processor_get_info()
ACPI: Rename ACPI_HOTPLUG_CPU to include 'present'
ACPI: Rename acpi_processor_hotadd_init and remove pre-processor
guards
ACPI: Check _STA present bit before making CPUs not present
ACPI: Warn when the present bit changes but the feature is not enabled
drivers: base: Implement weak arch_unregister_cpu()
LoongArch: Use the __weak version of arch_unregister_cpu()
arm64: acpi: Move get_cpu_for_acpi_id() to a header
ACPICA: Add new MADT GICC flags fields [code first?]
arm64, irqchip/gic-v3, ACPI: Move MADT GICC enabled check into a
helper
irqchip/gic-v3: Don't return errors from gic_acpi_match_gicc()
irqchip/gic-v3: Add support for ACPI's disabled but 'online capable'
CPUs
ACPI: add support to register CPUs based on the _STA enabled bit
arm64: document virtual CPU hotplug's expectations
Jean-Philippe Brucker (3):
arm64: psci: Ignore DENIED CPUs
KVM: arm64: Pass hypercalls to userspace
KVM: arm64: Pass PSCI calls to userspace
Documentation/arm64/cpu-hotplug.rst | 79 ++++++++++++++++++
Documentation/arm64/index.rst | 1 +
Documentation/virt/kvm/api.rst | 31 ++++++-
Documentation/virt/kvm/arm/hypercalls.rst | 1 +
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/acpi.h | 11 +++
arch/arm64/include/asm/cpu.h | 1 -
arch/arm64/include/asm/kvm_host.h | 2 +
arch/arm64/kernel/acpi_numa.c | 11 ---
arch/arm64/kernel/psci.c | 2 +-
arch/arm64/kernel/setup.c | 13 +--
arch/arm64/kernel/smp.c | 5 +-
arch/arm64/kvm/arm.c | 15 +++-
arch/arm64/kvm/hypercalls.c | 28 ++++++-
arch/arm64/kvm/psci.c | 13 +++
arch/ia64/Kconfig | 2 +
arch/ia64/include/asm/acpi.h | 2 +-
arch/ia64/include/asm/cpu.h | 11 ---
arch/ia64/kernel/acpi.c | 6 +-
arch/ia64/kernel/setup.c | 2 +-
arch/ia64/kernel/topology.c | 35 ++------
arch/loongarch/Kconfig | 2 +
arch/loongarch/kernel/topology.c | 31 +------
arch/x86/Kconfig | 2 +
arch/x86/include/asm/cpu.h | 6 --
arch/x86/kernel/acpi/boot.c | 4 +-
arch/x86/kernel/topology.c | 19 +----
drivers/acpi/Kconfig | 5 +-
drivers/acpi/acpi_processor.c | 99 ++++++++++++++++-------
drivers/acpi/processor_core.c | 2 +-
drivers/base/cpu.c | 21 +++--
drivers/base/init.c | 2 +-
drivers/firmware/psci/psci.c | 2 +
drivers/irqchip/irq-gic-v3.c | 38 +++++----
include/acpi/actbl2.h | 1 +
include/kvm/arm_hypercalls.h | 1 +
include/kvm/arm_psci.h | 4 +
include/linux/acpi.h | 10 ++-
include/linux/cpu.h | 6 ++
include/uapi/linux/kvm.h | 2 +
40 files changed, 339 insertions(+), 190 deletions(-)
create mode 100644 Documentation/arm64/cpu-hotplug.rst
--
2.30.2
Hi Jonathan,Lorenzo,all,
Do we have any topic to sync on our LOD meeting next week?
Thanks:)
Joyce
> 在 2022年10月18日,上午8:00,linaro-open-discussions-request@op-lists.linaro.org 写道:
>
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> 1. Re: Invitation: Linaro Open Discussions monthly meeting @ Wed 5 Oct 2022 19:00 - 20:00 (HKT) (linaro-open-discussions(a)op-lists.linaro.org)
> (Salil Mehta)
>
>
> ----------------------------------------------------------------------
>
> Message: 1
> Date: Mon, 17 Oct 2022 16:12:26 +0000
> From: Salil Mehta <salil.mehta(a)huawei.com>
> Subject: [Linaro-open-discussions] Re: Invitation: Linaro Open
> Discussions monthly meeting @ Wed 5 Oct 2022 19:00 - 20:00 (HKT)
> (linaro-open-discussions(a)op-lists.linaro.org)
> To: "joyce.qi(a)linaro.org" <joyce.qi(a)linaro.org>, "james.morse(a)arm.com"
> <james.morse(a)arm.com>
> Cc: "linaro-open-discussions(a)op-lists.linaro.org"
> <linaro-open-discussions(a)op-lists.linaro.org>,
> "lorenzo.pieralisi(a)linaro.org" <lorenzo.pieralisi(a)linaro.org>,
> "ilkka(a)os.amperecomputing.com" <ilkka(a)os.amperecomputing.com>,
> Jean-Philippe Brucker <jean-philippe.brucker(a)arm.com>,
> "salil.mehta(a)opnsrc.net" <salil.mehta(a)opnsrc.net>
> Message-ID: <12408d4c06604dd4bd8e017adf7e5fe6(a)huawei.com>
> Content-Type: text/plain; charset="utf-8"
>
> Hi James,
> As discussed in the meeting below are the repositories which you might want to have a look.
>
> [1] Forward ported QEMU with some fixes was shared (by Salil)
> https://github.com/salil-mehta/qemu.git virt-cpuhp-armv8/rfc-v1-port29092022
>
> [2] James Approach with online-capable and present==possible (some fixes)
> https://github.com/salil-mehta/linux.git virt-cpuhp-arm64/rfc-v2/jmorse-pres-eq-poss-cpu
>
> [3] Variant of James approach with online-capable and conditionally present cpus
> https://github.com/salil-mehta/linux.git virt-cpuhp-arm64/rfc-v2/jmorse-variant-with-cond-present-cpu
>
> I have also shared the LOD presentation with Joyce for uploading to the site.
>
> Attachment:
> [1] Linaro Open Discussion Meeting Update - 05102022 - Salil_Mehta-fixed.pdf
>
>
> Many thanks
> Salil
>
>> -----Original Message-----
>> From: Google Calendar [mailto:calendar-notification@google.com] On Behalf Of
>> Joyce Qi via Linaro-open-discussions
>> Sent: Wednesday, October 5, 2022 9:31 AM
>> To: linaro-open-discussions(a)op-lists.linaro.org; james.morse(a)arm.com;
>> Jonathan Cameron <jonathan.cameron(a)huawei.com>; lorenzo.pieralisi(a)linaro.org;
>> ilkka(a)os.amperecomputing.com
>> Subject: [Linaro-open-discussions] Invitation: Linaro Open Discussions monthly
>> meeting @ Wed 5 Oct 2022 19:00 - 20:00 (HKT)
>> (linaro-open-discussions(a)op-lists.linaro.org)
>>
>> Linaro Open Discussions monthly meeting
>> Wednesday 5 Oct 2022 ⋅ 19:00 – 20:00
>> Hong Kong Standard Time
>>
>> Location
>> https://linaro-org.zoom.us/j/95682500341
>> https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9568250
>> 0341&sa=D&source=calendar&usd=2&usg=AOvVaw2JDK9LgOcXl2WanQ86Y-6h
>>
>>
>>
>> Joyce QI 邀请您参加预先安排的 Zoom 会议。
>>
>> 加入 Zoom 会议
>> https://linaro-org.zoom.us/j/95682500341
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Hi Lorenzo,
I have noticed you are in holiday on Nov,1st. I can switch the meeting to Nov 2nd if other people are free.
@Lorenzo,James,
Can we arrange Zhangfei’s questions( TLB missing impact the performance in vsva/ sva) as below in next meeting.
Or can you help involve any other experts focus on this? Appreciated so much for your help here.
Thanks:)
Joyce
> 在 2022年10月28日,上午8:00,linaro-open-discussions-request@op-lists.linaro.org 写道:
>
> Send Linaro-open-discussions mailing list submissions to
> linaro-open-discussions(a)op-lists.linaro.org
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> body 'help' to
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> 1. Re: Linaro-open-discussions Digest, Vol 25, Issue 3 (Zhangfei Gao)
>
>
> ----------------------------------------------------------------------
>
> Message: 1
> Date: Thu, 27 Oct 2022 12:06:59 +0800
> From: Zhangfei Gao <zhangfei.gao(a)linaro.org>
> Subject: [Linaro-open-discussions] Re: Linaro-open-discussions Digest,
> Vol 25, Issue 3
> To: Joyce Qi <joyce.qi(a)linaro.org>, Lorenzo Pieralisi
> <lorenzo.pieralisi(a)linaro.org>, jean-philippe
> <jean-philippe(a)linaro.org>
> Cc: linaro-open-discussions(a)op-lists.linaro.org, linux(a)armlinux.org.uk
> Message-ID: <2fba7536-1475-4755-9084-a920addecc42(a)linaro.org>
> Content-Type: text/plain; charset=utf-8; format=flowed
>
> Hi, Lorenzo
>
> When we debug vsva, sva on guest with 2-stage translation,
> we found tlb miss impact performance a lot, with Jean's help.
>
> Currently we are using huge page feature in glibc to overcome this issue.
> With huge page, vsva in guest can achieve comparable performance as sva
> in host.
>
> More details: https://docs.qq.com/doc/DRXlpQmpTSlBZTGZZ
> Will do some
>
> Basically we are using two optimization methods/
> host sva: using memset fist to overcome io page fault, since cpu alloc
> physical memory is much faster than smmu.
> guest vsva: using huge page to overcome tlbmiss.
>
> The customer are asking whether (next version) silicon (smmu) can do
> some help to concur tlb miss issue or io page fault issue.
> If so, software can be simpler.
> Any suggestions?
>
> Thanks
>
>
> On 2022/10/20 下午8:47, Joyce Qi via Linaro-open-discussions wrote:
>> Hi Jonathan,Lorenzo,all,
>>
>> Do we have any topic to sync on our LOD meeting next week?
>>
>> Thanks:)
>> Joyce
>>
>>
>>
>
>
> ------------------------------
>
> Subject: Digest Footer
>
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>
> ------------------------------
>
> End of Linaro-open-discussions Digest, Vol 25, Issue 9
> ******************************************************
Linaro Open Discussions monthly meeting
Wednesday 5 Oct 2022 ⋅ 19:00 – 20:00
Hong Kong Standard Time
Location
https://linaro-org.zoom.us/j/95682500341https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9568250…
Joyce QI 邀请您参加预先安排的 Zoom 会议。
加入 Zoom 会议
https://linaro-org.zoom.us/j/95682500341
会议号:956 8250 0341
手机一键拨号
+16699009128,,95682500341# 美国 (San Jose)
+13462487799,,95682500341# 美国 (Houston)
根据您的位置拨号
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+1 346 248 7799 美国 (Houston)
+1 253 215 8782 美国 (Tacoma)
+1 646 558 8656 美国 (New York)
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+1 312 626 6799 美国 (Chicago)
888 788 0099 美国 免费
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查找本地号码:https://linaro-org.zoom.us/u/ady2J9Zn7t
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Invitation from Google Calendar: https://calendar.google.com/calendar/
You are receiving this email because you are an attendee of the event. To
stop receiving future updates for this event, decline this event.
Forwarding this invitation could allow any recipient to send a response to
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Learn more https://support.google.com/calendar/answer/37135#forwarding
Hi Lorenzo,
I have noticed you are in holiday on Nov,1st. I can switch the meeting
to Nov 2nd if other people are free.
@Lorenzo,James,
Can we arrange Zhangfei’s questions( TLB missing impact the
performance in vsva/ sva) as below in next meeting.
Or can you help involve any other experts focus on this? Appreciated so
much for your help here.
Thanks:)
Joyce
在
2022年10月28日,上午8:00,linaro-open-discussions-request@op-lists.linaro.o
rg 写道:
Send Linaro-open-discussions mailing list submissions to
linaro-open-discussions(a)op-lists.linaro.org
To subscribe or unsubscribe via email, send a message with subject
or
body 'help' to
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You can reach the person managing the list at
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When replying, please edit your Subject line so it is more specific
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Today's Topics:
1. Re: Linaro-open-discussions Digest, Vol 25, Issue 3 (Zhangfei
Gao)
--------------------------------------------------------------------
--
Message: 1
Date: Thu, 27 Oct 2022 12:06:59 +0800
From: Zhangfei Gao <zhangfei.gao(a)linaro.org>
Subject: [Linaro-open-discussions] Re: Linaro-open-discussions
Digest,
Vol 25, Issue 3
To: Joyce Qi <joyce.qi(a)linaro.org>, Lorenzo Pieralisi
<lorenzo.pieralisi(a)linaro.org>, jean-philippe
<jean-philippe(a)linaro.org>
Cc: linaro-open-discussions(a)op-lists.linaro.org,
linux(a)armlinux.org.uk
Message-ID: <2fba7536-1475-4755-9084-a920addecc42(a)linaro.org>
Content-Type: text/plain; charset=utf-8; format=flowed
Hi, Lorenzo
When we debug vsva, sva on guest with 2-stage translation,
we found tlb miss impact performance a lot, with Jean's help.
Currently we are using huge page feature in glibc to overcome this
issue.
With huge page, vsva in guest can achieve comparable performance as
sva
in host.
More details: https://docs.qq.com/doc/DRXlpQmpTSlBZTGZZ
Will do some
Basically we are using two optimization methods/
host sva: using memset fist to overcome io page fault, since cpu
alloc
physical memory is much faster than smmu.
guest vsva: using huge page to overcome tlbmiss.
The customer are asking whether (next version) silicon (smmu) can do
some help to concur tlb miss issue or io page fault issue.
If so, software can be simpler.
Any suggestions?
Thanks
On 2022/10/20 下午8:47, Joyce Qi via Linaro-open-discussions wrote:
Hi Jonathan,Lorenzo,all,
Do we have any topic to sync on our LOD meeting next week?
Thanks:)
Joyce
------------------------------
Subject: Digest Footer
Linaro-open-discussions mailing list --
linaro-open-discussions(a)op-lists.linaro.org
To unsubscribe send an email to
linaro-open-discussions-leave(a)op-lists.linaro.org
------------------------------
End of Linaro-open-discussions Digest, Vol 25, Issue 9
******************************************************
Hi Lorenzo,
I have noticed you are in holiday on Nov,1st. I can switch the meeting to Nov 2nd if other people are free.
@Lorenzo,James,
Can we arrange Zhangfei’s questions( TLB missing impact the performance in vsva/ sva) as below in next meeting.
Or can you help involve any other experts focus on this? Appreciated so much for your help here.
Thanks:)
Joyce
> 在 2022年10月28日,上午8:00,linaro-open-discussions-request@op-lists.linaro.org 写道:
>
> Send Linaro-open-discussions mailing list submissions to
> linaro-open-discussions(a)op-lists.linaro.org
>
> To subscribe or unsubscribe via email, send a message with subject or
> body 'help' to
> linaro-open-discussions-request(a)op-lists.linaro.org
>
> You can reach the person managing the list at
> linaro-open-discussions-owner(a)op-lists.linaro.org
>
> When replying, please edit your Subject line so it is more specific
> than "Re: Contents of Linaro-open-discussions digest..."
>
> Today's Topics:
>
> 1. Re: Linaro-open-discussions Digest, Vol 25, Issue 3 (Zhangfei Gao)
>
>
> ----------------------------------------------------------------------
>
> Message: 1
> Date: Thu, 27 Oct 2022 12:06:59 +0800
> From: Zhangfei Gao <zhangfei.gao(a)linaro.org>
> Subject: [Linaro-open-discussions] Re: Linaro-open-discussions Digest,
> Vol 25, Issue 3
> To: Joyce Qi <joyce.qi(a)linaro.org>, Lorenzo Pieralisi
> <lorenzo.pieralisi(a)linaro.org>, jean-philippe
> <jean-philippe(a)linaro.org>
> Cc: linaro-open-discussions(a)op-lists.linaro.org, linux(a)armlinux.org.uk
> Message-ID: <2fba7536-1475-4755-9084-a920addecc42(a)linaro.org>
> Content-Type: text/plain; charset=utf-8; format=flowed
>
> Hi, Lorenzo
>
> When we debug vsva, sva on guest with 2-stage translation,
> we found tlb miss impact performance a lot, with Jean's help.
>
> Currently we are using huge page feature in glibc to overcome this issue.
> With huge page, vsva in guest can achieve comparable performance as sva
> in host.
>
> More details: https://docs.qq.com/doc/DRXlpQmpTSlBZTGZZ
> Will do some
>
> Basically we are using two optimization methods/
> host sva: using memset fist to overcome io page fault, since cpu alloc
> physical memory is much faster than smmu.
> guest vsva: using huge page to overcome tlbmiss.
>
> The customer are asking whether (next version) silicon (smmu) can do
> some help to concur tlb miss issue or io page fault issue.
> If so, software can be simpler.
> Any suggestions?
>
> Thanks
>
>
> On 2022/10/20 下午8:47, Joyce Qi via Linaro-open-discussions wrote:
>> Hi Jonathan,Lorenzo,all,
>>
>> Do we have any topic to sync on our LOD meeting next week?
>>
>> Thanks:)
>> Joyce
>>
>>
>>
>
>
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>
> End of Linaro-open-discussions Digest, Vol 25, Issue 9
> ******************************************************
Linaro Open Discussions monthly meeting
Tuesday 1 Nov 2022 ⋅ 22:00 – 23:00
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Hi,
We don't have any topics for the meeting today, so let's cancel it.
The time slot we've allocated for this meeting is either bad or worse
for me so I'd like to try and find a new time slot. Please use the
doodle link [1] below to record your preferences. The doodle poll is
public so feel free to email me directly instead in case you're more
comfortable with that. This is my first time creating a doodle poll,
so apologies if I've made a mess of it.
As noted in the poll we're looking for a day and time in the fourth
week of the month. We're using the CET time zone as many of us are in
the time zone.
If you can't find any time that works for you please send me a mail
with more suitable times and I'll try to work out something. Let's
give this a week or so to possibly settle on a new time slot.
[1] https://doodle.com/meeting/participate/id/dJqR4Eyb
Thanks,
Jens