Enable the required config options to run panfrost/komeda in the default defconfig for Morello Transitional PureCap User ABI (PCuABI) (morello_transitional_pcuabi_defconfig).
Note: The series was verified only by CI and at framebuffer level. Further testing is required to exercise all the components.
To simplify future testing of this series the complete patch set applied on top of recent morello kernel can be found at [1].
[1] https://git.morello-project.org/vincenzo/linux morello/drm/v1
Co-developed-by: Kevin Brodsky kevin.brodsky@arm.com Co-developed-by: Carsten Haitzler Carsten.Haitzler@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com
Liviu Dudau (1): drm/komeda: Fix handling of atomic commits in the atomic_commit_tail hook
Vincenzo Frascino (9): morello: dt: Add support for the FVP, SoC Revert "drm/komeda - Fix handling of pending crtc state commit to avoid lock-up" drm: drm_legacy: Fix CONFIG_DRM_LEGACY guards in drm_legacy.h media: cec: Use proper type to represent user pointers fbdev: Use proper typecast for capability type drm: i2c: Include hdmi-codec definitions only when required rtc: Use proper type to represent user pointers morello: Enable GPU/DPU in defconfig morello: Enable RTC support
arch/arm64/boot/dts/arm/Makefile | 1 + arch/arm64/boot/dts/arm/morello-fvp.dts | 171 +++++++++++ arch/arm64/boot/dts/arm/morello-soc.dts | 278 ++++++++++++++++++ arch/arm64/boot/dts/arm/morello.dtsi | 124 ++++++++ .../morello_transitional_pcuabi_defconfig | 11 + .../gpu/drm/arm/display/komeda/komeda_crtc.c | 14 +- .../gpu/drm/arm/display/komeda/komeda_kms.c | 40 +-- .../gpu/drm/arm/display/komeda/komeda_kms.h | 5 +- drivers/gpu/drm/drm_legacy.h | 2 +- drivers/gpu/drm/i2c/tda998x_drv.c | 13 + drivers/media/cec/core/cec-api.c | 4 +- drivers/rtc/dev.c | 4 +- drivers/video/fbdev/core/fbmem.c | 7 +- 13 files changed, 633 insertions(+), 41 deletions(-) create mode 100644 arch/arm64/boot/dts/arm/morello-fvp.dts create mode 100644 arch/arm64/boot/dts/arm/morello-soc.dts create mode 100644 arch/arm64/boot/dts/arm/morello.dtsi
Import the Morello dts (SoC, FVP) from the Trusted Firmware and add Panfrost GPU/DPU support.
Co-developed-by: Carsten Haitzler Carsten.Haitzler@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com --- arch/arm64/boot/dts/arm/Makefile | 1 + arch/arm64/boot/dts/arm/morello-fvp.dts | 171 +++++++++++++++ arch/arm64/boot/dts/arm/morello-soc.dts | 278 ++++++++++++++++++++++++ arch/arm64/boot/dts/arm/morello.dtsi | 124 +++++++++++ 4 files changed, 574 insertions(+) create mode 100644 arch/arm64/boot/dts/arm/morello-fvp.dts create mode 100644 arch/arm64/boot/dts/arm/morello-soc.dts create mode 100644 arch/arm64/boot/dts/arm/morello.dtsi
diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile index 4382b73baef5..ed025c949e2d 100644 --- a/arch/arm64/boot/dts/arm/Makefile +++ b/arch/arm64/boot/dts/arm/Makefile @@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb juno-r2.dtb juno-scmi.dtb ju dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb dtb-$(CONFIG_ARCH_VEXPRESS) += fvp-base-revc.dtb +dtb-$(CONFIG_ARM64_MORELLO) += morello-soc.dtb morello-fvp.dtb diff --git a/arch/arm64/boot/dts/arm/morello-fvp.dts b/arch/arm64/boot/dts/arm/morello-fvp.dts new file mode 100644 index 000000000000..de78bcc89b55 --- /dev/null +++ b/arch/arm64/boot/dts/arm/morello-fvp.dts @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (c) 2020, Arm Limited. All rights reserved. + */ + +/dts-v1/; +#include "morello.dtsi" + +/ { + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure-firmware@ff000000 { + reg = <0 0xff000000 0 0x01000000>; + no-map; + }; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&CPU0>; + }; + core1 { + cpu = <&CPU1>; + }; + }; + cluster1 { + core0 { + cpu = <&CPU2>; + }; + core1 { + cpu = <&CPU3>; + }; + }; + }; + CPU0: cpu0@0 { + compatible = "arm,armv8"; + reg = <0x0 0x0>; + device_type = "cpu"; + enable-method = "psci"; + clocks = <&scmi_dvfs 0>; + }; + CPU1: cpu1@100 { + compatible = "arm,armv8"; + reg = <0x0 0x100>; + device_type = "cpu"; + enable-method = "psci"; + clocks = <&scmi_dvfs 0>; + }; + CPU2: cpu2@10000 { + compatible = "arm,armv8"; + reg = <0x0 0x10000>; + device_type = "cpu"; + enable-method = "psci"; + clocks = <&scmi_dvfs 1>; + }; + CPU3: cpu3@10100 { + compatible = "arm,armv8"; + reg = <0x0 0x10100>; + device_type = "cpu"; + enable-method = "psci"; + clocks = <&scmi_dvfs 1>; + }; + }; + + /* The first bank of memory, memory map is actually provided by UEFI. */ + memory@80000000 { + #address-cells = <2>; + #size-cells = <2>; + device_type = "memory"; + /* [0x80000000-0xffffffff] */ + reg = <0x00000000 0x80000000 0x0 0x80000000>; + }; + + memory@8080000000 { + #address-cells = <2>; + #size-cells = <2>; + device_type = "memory"; + /* [0x8080000000-0x83ffffffff] */ + reg = <0x00000080 0x80000000 0x1 0x80000000>; + }; + + virtio_block@1c170000 { + compatible = "virtio,mmio"; + reg = <0x0 0x1c170000 0x0 0x200>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + }; + + virtio_net@1c180000 { + compatible = "virtio,mmio"; + reg = <0x0 0x1c180000 0x0 0x200>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + }; + + virtio_rng@1c190000 { + compatible = "virtio,mmio"; + reg = <0x0 0x1c190000 0x0 0x200>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + }; + + virtio_p9@1c1a0000 { + compatible = "virtio,mmio"; + reg = <0x0 0x1c1a0000 0x0 0x200>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + }; + + ethernet@1d100000 { + compatible = "smsc,lan91c111"; + reg = <0x0 0x1d100000 0x0 0x10000>; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + }; + + kmi@1c150000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x0 0x1c150000 0x0 0x1000>; + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&bp_clock24mhz>, <&bp_clock24mhz>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + kmi@1c160000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x0 0x1c160000 0x0 0x1000>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&bp_clock24mhz>, <&bp_clock24mhz>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + firmware { + scmi { + compatible = "arm,scmi"; + mbox-names = "tx", "rx"; + mboxes = <&mailbox 1 0 &mailbox 1 1>; + shmem = <&cpu_scp_hpri0 &cpu_scp_hpri1>; + #address-cells = <1>; + #size-cells = <0>; + + scmi_dvfs: protocol@13 { + reg = <0x13>; + #clock-cells = <1>; + }; + }; + }; + + bp_clock24mhz: clock24mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "bp:clock24mhz"; + }; +}; + +&gic { + reg = <0x0 0x30000000 0 0x10000>, /* GICD */ + <0x0 0x300c0000 0 0x80000>; /* GICR */ + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; +}; + + diff --git a/arch/arm64/boot/dts/arm/morello-soc.dts b/arch/arm64/boot/dts/arm/morello-soc.dts new file mode 100644 index 000000000000..f9e062331033 --- /dev/null +++ b/arch/arm64/boot/dts/arm/morello-soc.dts @@ -0,0 +1,278 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (c) 2021, Arm Limited. All rights reserved. + */ + +/dts-v1/; +#include "morello.dtsi" + +/ { + + chosen { + stdout-path = "soc_uart0:115200n8"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure-firmware@ff000000 { + reg = <0 0xff000000 0 0x01000000>; + no-map; + }; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + cpu0@0 { + compatible = "arm,armv8"; + reg = <0x0 0x0>; + device_type = "cpu"; + enable-method = "psci"; + clocks = <&scmi_dvfs 0>; + }; + cpu1@100 { + compatible = "arm,armv8"; + reg = <0x0 0x100>; + device_type = "cpu"; + enable-method = "psci"; + clocks = <&scmi_dvfs 0>; + }; + cpu2@10000 { + compatible = "arm,armv8"; + reg = <0x0 0x10000>; + device_type = "cpu"; + enable-method = "psci"; + clocks = <&scmi_dvfs 1>; + }; + cpu3@10100 { + compatible = "arm,armv8"; + reg = <0x0 0x10100>; + device_type = "cpu"; + enable-method = "psci"; + clocks = <&scmi_dvfs 1>; + }; + }; + + /* The first bank of memory, memory map is actually provided by UEFI. */ + memory@80000000 { + #address-cells = <2>; + #size-cells = <2>; + device_type = "memory"; + /* [0x80000000-0xffffffff] */ + reg = <0x00000000 0x80000000 0x0 0x7F000000>; + }; + + memory@8080000000 { + #address-cells = <2>; + #size-cells = <2>; + device_type = "memory"; + /* [0x8080000000-0x83f7ffffff] */ + reg = <0x00000080 0x80000000 0x3 0x78000000>; + }; + + smmu_pcie: iommu@4f400000 { + compatible = "arm,smmu-v3"; + reg = <0 0x4f400000 0 0x40000>; + interrupts = <GIC_SPI 235 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 237 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eventq", "priq", "cmdq-sync", "gerror"; + msi-parent = <&its2 0>; + #iommu-cells = <1>; + dma-coherent; + }; + + pcie_ctlr: pcie@28c0000000 { + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + reg = <0x28 0xC0000000 0 0x10000000>; + bus-range = <0 255>; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + dma-coherent; + ranges = <0x01000000 0x00 0x00000000 0x00 0x6F000000 0x00 0x00800000>, + <0x02000000 0x00 0x60000000 0x00 0x60000000 0x00 0x0F000000>, + <0x42000000 0x09 0x00000000 0x09 0x00000000 0x1F 0xC0000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic 0 0 0 170 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic 0 0 0 171 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic 0 0 0 172 IRQ_TYPE_LEVEL_HIGH>; + msi-map = <0 &its_pcie 0 0x10000>; + iommu-map = <0 &smmu_pcie 0 0x10000>; + status = "okay"; + }; + + smmu_ccix: iommu@4f000000 { + compatible = "arm,smmu-v3"; + reg = <0 0x4f000000 0 0x40000>; + interrupts = <GIC_SPI 228 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 229 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 230 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eventq", "priq", "cmdq-sync", "gerror"; + msi-parent = <&its1 0>; + #iommu-cells = <1>; + dma-coherent; + }; + + ccix_pcie_ctlr: pcie@4fc0000000 { + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + reg = <0x4F 0xC0000000 0 0x10000000>; + bus-range = <0 255>; + linux,pci-domain = <1>; + #address-cells = <3>; + #size-cells = <2>; + dma-coherent; + ranges = <0x01000000 0x00 0x00000000 0x00 0x7F000000 0x00 0x00800000>, + <0x02000000 0x00 0x70000000 0x00 0x70000000 0x00 0x0F000000>, + <0x42000000 0x30 0x00000000 0x30 0x00000000 0x1F 0xC0000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic 0 0 0 201 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic 0 0 0 202 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic 0 0 0 203 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic 0 0 0 204 IRQ_TYPE_LEVEL_HIGH>; + msi-map = <0 &its_ccix 0 0x10000>; + iommu-map = <0 &smmu_ccix 0 0x10000>; + status = "okay"; + }; + + smmu_dp: iommu@2ce00000 { + compatible = "arm,smmu-v3"; + reg = <0 0x2ce00000 0 0x40000>; + interrupts = <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eventq", "cmdq-sync", "gerror"; + #iommu-cells = <1>; + }; + + dp0: display@2cc00000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "arm,mali-d32"; + reg = <0 0x2cc00000 0 0x20000>; + interrupts = <0 69 4>; + interrupt-names = "DPU"; + clocks = <&dpu_aclk>; + clock-names = "aclk"; + iommus = <&smmu_dp 0>, <&smmu_dp 1>, <&smmu_dp 2>, <&smmu_dp 3>, + <&smmu_dp 8>; + + pl0: pipeline@0 { + reg = <0>; + clocks = <&dpu_pixel_clk>; + clock-names = "pxclk"; + pl_id = <0>; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + dp_pl0_out0: endpoint { + remote-endpoint = <&tda998x_0_input>; + }; + }; + }; + }; + }; + + i2c@1c0f0000 { + compatible = "cdns,i2c-r1p14"; + reg = <0x0 0x1c0f0000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + i2c-sda-hold-time-ns = <500>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&dpu_aclk>; + + hdmi-transmitter@70 { + compatible = "nxp,tda998x"; + reg = <0x70>; + video-ports = <0x234501>; + port { + tda998x_0_input: endpoint { + remote-endpoint = <&dp_pl0_out0>; + }; + }; + }; + }; + + dpu_aclk: dpu_aclk { + /* 77.1 MHz derived from 24 MHz reference clock */ + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <350000000>; + clock-output-names = "aclk"; + }; + + dpu_pixel_clk: dpu-pixel-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + clock-output-names = "pxclk"; + }; + + firmware { + scmi { + compatible = "arm,scmi"; + mbox-names = "tx", "rx"; + mboxes = <&mailbox 1 0 &mailbox 1 1>; + shmem = <&cpu_scp_hpri0 &cpu_scp_hpri1>; + #address-cells = <1>; + #size-cells = <0>; + scmi_dvfs: protocol@13 { + reg = <0x13>; + #clock-cells = <1>; + }; + scmi_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + }; + }; +}; + +&gic { + reg = <0x0 0x30000000 0 0x10000>, /* GICD */ + <0x0 0x300c0000 0 0x80000>; /* GICR */ + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + + its1: its@30040000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x0 0x30040000 0x0 0x20000>; + }; + + its2: its@30060000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x0 0x30060000 0x0 0x20000>; + }; + + its_ccix: its@30080000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x0 0x30080000 0x0 0x20000>; + }; + + its_pcie: its@300a0000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x0 0x300a0000 0x0 0x20000>; + }; +}; + diff --git a/arch/arm64/boot/dts/arm/morello.dtsi b/arch/arm64/boot/dts/arm/morello.dtsi new file mode 100644 index 000000000000..198201fdfc71 --- /dev/null +++ b/arch/arm64/boot/dts/arm/morello.dtsi @@ -0,0 +1,124 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/* + * Copyright (c) 2020-2021, Arm Limited. All rights reserved. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "arm,morello"; + + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &soc_uart0; + }; + + gic: interrupt-controller@2c010000 { + compatible = "arm,gic-600", "arm,gic-v3"; + #address-cells = <2>; + #interrupt-cells = <3>; + #size-cells = <2>; + ranges; + interrupt-controller; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; + }; + + spe-pmu { + compatible = "arm,statistical-profiling-extension-v1"; + interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + + mailbox: mhu@45000000 { + compatible = "arm,mhu-doorbell", "arm,primecell"; + reg = <0x0 0x45000000 0x0 0x1000>; + interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mhu_lpri_rx", + "mhu_hpri_rx"; + #mbox-cells = <2>; + mbox-name = "ARM-MHU"; + clocks = <&soc_refclk50mhz>; + clock-names = "apb_pclk"; + }; + + sram: sram@45200000 { + compatible = "mmio-sram"; + reg = <0x0 0x06000000 0x0 0x8000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x06000000 0x8000>; + + cpu_scp_hpri0: scp-shmem@0 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x80>; + }; + + cpu_scp_hpri1: scp-shmem@80 { + compatible = "arm,scmi-shmem"; + reg = <0x80 0x80>; + }; + }; + + soc_refclk50mhz: refclk50mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + clock-output-names = "apb_pclk"; + }; + + soc_uartclk: uartclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + clock-output-names = "uartclk"; + }; + + soc_uart0: uart@2a400000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0x2a400000 0x0 0x1000>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&soc_uartclk>, <&soc_refclk50mhz>; + clock-names = "uartclk", "apb_pclk"; + status = "okay"; + }; + + gpu: gpu@2d000000 { + compatible = "arm,mali-bifrost"; + reg = <0x0 0x2d000000 0x0 0x4000>; + interrupts = <0 66 4>, <0 67 4>, <0 65 4>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&clk_mali>; + clock-names = "clk_mali"; + status = "okay"; + }; + + clk_mali: clkmali650mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <650000000>; + clock-output-names = "clk_mali"; + }; + +}; +
ACK
Singed-off-by: Carsten Haitzler Carsten.Haitzler@arm.com
On 1/16/23 15:12, Vincenzo Frascino wrote:
Import the Morello dts (SoC, FVP) from the Trusted Firmware and add Panfrost GPU/DPU support.
Co-developed-by: Carsten Haitzler Carsten.Haitzler@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com
arch/arm64/boot/dts/arm/Makefile | 1 + arch/arm64/boot/dts/arm/morello-fvp.dts | 171 +++++++++++++++ arch/arm64/boot/dts/arm/morello-soc.dts | 278 ++++++++++++++++++++++++ arch/arm64/boot/dts/arm/morello.dtsi | 124 +++++++++++ 4 files changed, 574 insertions(+) create mode 100644 arch/arm64/boot/dts/arm/morello-fvp.dts create mode 100644 arch/arm64/boot/dts/arm/morello-soc.dts create mode 100644 arch/arm64/boot/dts/arm/morello.dtsi
diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile index 4382b73baef5..ed025c949e2d 100644 --- a/arch/arm64/boot/dts/arm/Makefile +++ b/arch/arm64/boot/dts/arm/Makefile @@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb juno-r2.dtb juno-scmi.dtb ju dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb dtb-$(CONFIG_ARCH_VEXPRESS) += fvp-base-revc.dtb +dtb-$(CONFIG_ARM64_MORELLO) += morello-soc.dtb morello-fvp.dtb diff --git a/arch/arm64/boot/dts/arm/morello-fvp.dts b/arch/arm64/boot/dts/arm/morello-fvp.dts new file mode 100644 index 000000000000..de78bcc89b55 --- /dev/null +++ b/arch/arm64/boot/dts/arm/morello-fvp.dts @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/*
- Copyright (c) 2020, Arm Limited. All rights reserved.
- */
+/dts-v1/; +#include "morello.dtsi"
+/ {
- chosen {
stdout-path = "serial0:115200n8";- };
- reserved-memory {
#address-cells = <2>;#size-cells = <2>;ranges;secure-firmware@ff000000 {reg = <0 0xff000000 0 0x01000000>;no-map;};- };
- cpus {
#address-cells = <2>;#size-cells = <0>;cpu-map {cluster0 {core0 {cpu = <&CPU0>;};core1 {cpu = <&CPU1>;};};cluster1 {core0 {cpu = <&CPU2>;};core1 {cpu = <&CPU3>;};};};CPU0: cpu0@0 {compatible = "arm,armv8";reg = <0x0 0x0>;device_type = "cpu";enable-method = "psci";clocks = <&scmi_dvfs 0>;};CPU1: cpu1@100 {compatible = "arm,armv8";reg = <0x0 0x100>;device_type = "cpu";enable-method = "psci";clocks = <&scmi_dvfs 0>;};CPU2: cpu2@10000 {compatible = "arm,armv8";reg = <0x0 0x10000>;device_type = "cpu";enable-method = "psci";clocks = <&scmi_dvfs 1>;};CPU3: cpu3@10100 {compatible = "arm,armv8";reg = <0x0 0x10100>;device_type = "cpu";enable-method = "psci";clocks = <&scmi_dvfs 1>;};- };
- /* The first bank of memory, memory map is actually provided by UEFI. */
- memory@80000000 {
#address-cells = <2>;#size-cells = <2>;device_type = "memory";/* [0x80000000-0xffffffff] */reg = <0x00000000 0x80000000 0x0 0x80000000>;- };
- memory@8080000000 {
#address-cells = <2>;#size-cells = <2>;device_type = "memory";/* [0x8080000000-0x83ffffffff] */reg = <0x00000080 0x80000000 0x1 0x80000000>;- };
- virtio_block@1c170000 {
compatible = "virtio,mmio";reg = <0x0 0x1c170000 0x0 0x200>;interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;- };
- virtio_net@1c180000 {
compatible = "virtio,mmio";reg = <0x0 0x1c180000 0x0 0x200>;interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;- };
- virtio_rng@1c190000 {
compatible = "virtio,mmio";reg = <0x0 0x1c190000 0x0 0x200>;interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;- };
- virtio_p9@1c1a0000 {
compatible = "virtio,mmio";reg = <0x0 0x1c1a0000 0x0 0x200>;interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;- };
- ethernet@1d100000 {
compatible = "smsc,lan91c111";reg = <0x0 0x1d100000 0x0 0x10000>;interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;- };
- kmi@1c150000 {
compatible = "arm,pl050", "arm,primecell";reg = <0x0 0x1c150000 0x0 0x1000>;interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;clocks = <&bp_clock24mhz>, <&bp_clock24mhz>;clock-names = "KMIREFCLK", "apb_pclk";- };
- kmi@1c160000 {
compatible = "arm,pl050", "arm,primecell";reg = <0x0 0x1c160000 0x0 0x1000>;interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;clocks = <&bp_clock24mhz>, <&bp_clock24mhz>;clock-names = "KMIREFCLK", "apb_pclk";- };
- firmware {
scmi {compatible = "arm,scmi";mbox-names = "tx", "rx";mboxes = <&mailbox 1 0 &mailbox 1 1>;shmem = <&cpu_scp_hpri0 &cpu_scp_hpri1>;#address-cells = <1>;#size-cells = <0>;scmi_dvfs: protocol@13 {reg = <0x13>;#clock-cells = <1>;};};- };
- bp_clock24mhz: clock24mhz {
compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <24000000>;clock-output-names = "bp:clock24mhz";- };
+};
+&gic {
- reg = <0x0 0x30000000 0 0x10000>, /* GICD */
<0x0 0x300c0000 0 0x80000>; /* GICR */- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+};
diff --git a/arch/arm64/boot/dts/arm/morello-soc.dts b/arch/arm64/boot/dts/arm/morello-soc.dts new file mode 100644 index 000000000000..f9e062331033 --- /dev/null +++ b/arch/arm64/boot/dts/arm/morello-soc.dts @@ -0,0 +1,278 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/*
- Copyright (c) 2021, Arm Limited. All rights reserved.
- */
+/dts-v1/; +#include "morello.dtsi"
+/ {
- chosen {
stdout-path = "soc_uart0:115200n8";- };
- reserved-memory {
#address-cells = <2>;#size-cells = <2>;ranges;secure-firmware@ff000000 {reg = <0 0xff000000 0 0x01000000>;no-map;};- };
- cpus {
#address-cells = <2>;#size-cells = <0>;cpu0@0 {compatible = "arm,armv8";reg = <0x0 0x0>;device_type = "cpu";enable-method = "psci";clocks = <&scmi_dvfs 0>;};cpu1@100 {compatible = "arm,armv8";reg = <0x0 0x100>;device_type = "cpu";enable-method = "psci";clocks = <&scmi_dvfs 0>;};cpu2@10000 {compatible = "arm,armv8";reg = <0x0 0x10000>;device_type = "cpu";enable-method = "psci";clocks = <&scmi_dvfs 1>;};cpu3@10100 {compatible = "arm,armv8";reg = <0x0 0x10100>;device_type = "cpu";enable-method = "psci";clocks = <&scmi_dvfs 1>;};- };
- /* The first bank of memory, memory map is actually provided by UEFI. */
- memory@80000000 {
#address-cells = <2>;#size-cells = <2>;device_type = "memory";/* [0x80000000-0xffffffff] */reg = <0x00000000 0x80000000 0x0 0x7F000000>;- };
- memory@8080000000 {
#address-cells = <2>;#size-cells = <2>;device_type = "memory";/* [0x8080000000-0x83f7ffffff] */reg = <0x00000080 0x80000000 0x3 0x78000000>;- };
- smmu_pcie: iommu@4f400000 {
compatible = "arm,smmu-v3";reg = <0 0x4f400000 0 0x40000>;interrupts = <GIC_SPI 235 IRQ_TYPE_EDGE_RISING>,<GIC_SPI 40 IRQ_TYPE_EDGE_RISING>,<GIC_SPI 236 IRQ_TYPE_EDGE_RISING>,<GIC_SPI 237 IRQ_TYPE_EDGE_RISING>;interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";msi-parent = <&its2 0>;#iommu-cells = <1>;dma-coherent;- };
- pcie_ctlr: pcie@28c0000000 {
compatible = "pci-host-ecam-generic";device_type = "pci";reg = <0x28 0xC0000000 0 0x10000000>;bus-range = <0 255>;linux,pci-domain = <0>;#address-cells = <3>;#size-cells = <2>;dma-coherent;ranges = <0x01000000 0x00 0x00000000 0x00 0x6F000000 0x00 0x00800000>,<0x02000000 0x00 0x60000000 0x00 0x60000000 0x00 0x0F000000>,<0x42000000 0x09 0x00000000 0x09 0x00000000 0x1F 0xC0000000>;#interrupt-cells = <1>;interrupt-map-mask = <0 0 0 7>;interrupt-map = <0 0 0 1 &gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH>,<0 0 0 2 &gic 0 0 0 170 IRQ_TYPE_LEVEL_HIGH>,<0 0 0 3 &gic 0 0 0 171 IRQ_TYPE_LEVEL_HIGH>,<0 0 0 4 &gic 0 0 0 172 IRQ_TYPE_LEVEL_HIGH>;msi-map = <0 &its_pcie 0 0x10000>;iommu-map = <0 &smmu_pcie 0 0x10000>;status = "okay";- };
- smmu_ccix: iommu@4f000000 {
compatible = "arm,smmu-v3";reg = <0 0x4f000000 0 0x40000>;interrupts = <GIC_SPI 228 IRQ_TYPE_EDGE_RISING>,<GIC_SPI 41 IRQ_TYPE_EDGE_RISING>,<GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,<GIC_SPI 230 IRQ_TYPE_EDGE_RISING>;interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";msi-parent = <&its1 0>;#iommu-cells = <1>;dma-coherent;- };
- ccix_pcie_ctlr: pcie@4fc0000000 {
compatible = "pci-host-ecam-generic";device_type = "pci";reg = <0x4F 0xC0000000 0 0x10000000>;bus-range = <0 255>;linux,pci-domain = <1>;#address-cells = <3>;#size-cells = <2>;dma-coherent;ranges = <0x01000000 0x00 0x00000000 0x00 0x7F000000 0x00 0x00800000>,<0x02000000 0x00 0x70000000 0x00 0x70000000 0x00 0x0F000000>,<0x42000000 0x30 0x00000000 0x30 0x00000000 0x1F 0xC0000000>;#interrupt-cells = <1>;interrupt-map-mask = <0 0 0 7>;interrupt-map = <0 0 0 1 &gic 0 0 0 201 IRQ_TYPE_LEVEL_HIGH>,<0 0 0 2 &gic 0 0 0 202 IRQ_TYPE_LEVEL_HIGH>,<0 0 0 3 &gic 0 0 0 203 IRQ_TYPE_LEVEL_HIGH>,<0 0 0 4 &gic 0 0 0 204 IRQ_TYPE_LEVEL_HIGH>;msi-map = <0 &its_ccix 0 0x10000>;iommu-map = <0 &smmu_ccix 0 0x10000>;status = "okay";- };
- smmu_dp: iommu@2ce00000 {
compatible = "arm,smmu-v3";reg = <0 0x2ce00000 0 0x40000>;interrupts = <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>,<GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,<GIC_SPI 80 IRQ_TYPE_EDGE_RISING>;interrupt-names = "eventq", "cmdq-sync", "gerror";#iommu-cells = <1>;- };
- dp0: display@2cc00000 {
#address-cells = <1>;#size-cells = <0>;compatible = "arm,mali-d32";reg = <0 0x2cc00000 0 0x20000>;interrupts = <0 69 4>;interrupt-names = "DPU";clocks = <&dpu_aclk>;clock-names = "aclk";iommus = <&smmu_dp 0>, <&smmu_dp 1>, <&smmu_dp 2>, <&smmu_dp 3>,<&smmu_dp 8>;pl0: pipeline@0 {reg = <0>;clocks = <&dpu_pixel_clk>;clock-names = "pxclk";pl_id = <0>;ports {#address-cells = <1>;#size-cells = <0>;port@0 {reg = <0>;dp_pl0_out0: endpoint {remote-endpoint = <&tda998x_0_input>;};};};};- };
- i2c@1c0f0000 {
compatible = "cdns,i2c-r1p14";reg = <0x0 0x1c0f0000 0x0 0x1000>;#address-cells = <1>;#size-cells = <0>;clock-frequency = <100000>;i2c-sda-hold-time-ns = <500>;interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;clocks = <&dpu_aclk>;hdmi-transmitter@70 {compatible = "nxp,tda998x";reg = <0x70>;video-ports = <0x234501>;port {tda998x_0_input: endpoint {remote-endpoint = <&dp_pl0_out0>;};};};- };
- dpu_aclk: dpu_aclk {
/* 77.1 MHz derived from 24 MHz reference clock */compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <350000000>;clock-output-names = "aclk";- };
- dpu_pixel_clk: dpu-pixel-clk {
compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <148500000>;clock-output-names = "pxclk";- };
- firmware {
scmi {compatible = "arm,scmi";mbox-names = "tx", "rx";mboxes = <&mailbox 1 0 &mailbox 1 1>;shmem = <&cpu_scp_hpri0 &cpu_scp_hpri1>;#address-cells = <1>;#size-cells = <0>;scmi_dvfs: protocol@13 {reg = <0x13>;#clock-cells = <1>;};scmi_clk: protocol@14 {reg = <0x14>;#clock-cells = <1>;};};- };
+};
+&gic {
- reg = <0x0 0x30000000 0 0x10000>, /* GICD */
<0x0 0x300c0000 0 0x80000>; /* GICR */- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- its1: its@30040000 {
compatible = "arm,gic-v3-its";msi-controller;#msi-cells = <1>;reg = <0x0 0x30040000 0x0 0x20000>;- };
- its2: its@30060000 {
compatible = "arm,gic-v3-its";msi-controller;#msi-cells = <1>;reg = <0x0 0x30060000 0x0 0x20000>;- };
- its_ccix: its@30080000 {
compatible = "arm,gic-v3-its";msi-controller;#msi-cells = <1>;reg = <0x0 0x30080000 0x0 0x20000>;- };
- its_pcie: its@300a0000 {
compatible = "arm,gic-v3-its";msi-controller;#msi-cells = <1>;reg = <0x0 0x300a0000 0x0 0x20000>;- };
+};
diff --git a/arch/arm64/boot/dts/arm/morello.dtsi b/arch/arm64/boot/dts/arm/morello.dtsi new file mode 100644 index 000000000000..198201fdfc71 --- /dev/null +++ b/arch/arm64/boot/dts/arm/morello.dtsi @@ -0,0 +1,124 @@ +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) +/*
- Copyright (c) 2020-2021, Arm Limited. All rights reserved.
- */
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+/ {
- compatible = "arm,morello";
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
- aliases {
serial0 = &soc_uart0;- };
- gic: interrupt-controller@2c010000 {
compatible = "arm,gic-600", "arm,gic-v3";#address-cells = <2>;#interrupt-cells = <3>;#size-cells = <2>;ranges;interrupt-controller;- };
- pmu {
compatible = "arm,armv8-pmuv3";interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;- };
- spe-pmu {
compatible = "arm,statistical-profiling-extension-v1";interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;- };
- psci {
compatible = "arm,psci-0.2";method = "smc";- };
- timer {
compatible = "arm,armv8-timer";interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;- };
- mailbox: mhu@45000000 {
compatible = "arm,mhu-doorbell", "arm,primecell";reg = <0x0 0x45000000 0x0 0x1000>;interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>;interrupt-names = "mhu_lpri_rx","mhu_hpri_rx";#mbox-cells = <2>;mbox-name = "ARM-MHU";clocks = <&soc_refclk50mhz>;clock-names = "apb_pclk";- };
- sram: sram@45200000 {
compatible = "mmio-sram";reg = <0x0 0x06000000 0x0 0x8000>;#address-cells = <1>;#size-cells = <1>;ranges = <0 0x0 0x06000000 0x8000>;cpu_scp_hpri0: scp-shmem@0 {compatible = "arm,scmi-shmem";reg = <0x0 0x80>;};cpu_scp_hpri1: scp-shmem@80 {compatible = "arm,scmi-shmem";reg = <0x80 0x80>;};- };
- soc_refclk50mhz: refclk50mhz {
compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <50000000>;clock-output-names = "apb_pclk";- };
- soc_uartclk: uartclk {
compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <50000000>;clock-output-names = "uartclk";- };
- soc_uart0: uart@2a400000 {
compatible = "arm,pl011", "arm,primecell";reg = <0x0 0x2a400000 0x0 0x1000>;interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;clocks = <&soc_uartclk>, <&soc_refclk50mhz>;clock-names = "uartclk", "apb_pclk";status = "okay";- };
- gpu: gpu@2d000000 {
compatible = "arm,mali-bifrost";reg = <0x0 0x2d000000 0x0 0x4000>;interrupts = <0 66 4>, <0 67 4>, <0 65 4>;interrupt-names = "job", "mmu", "gpu";clocks = <&clk_mali>;clock-names = "clk_mali";status = "okay";- };
- clk_mali: clkmali650mhz {
compatible = "fixed-clock";#clock-cells = <0>;clock-frequency = <650000000>;clock-output-names = "clk_mali";- };
+};
From: Vincenzo Frascino Vincenzo.Frascino@arm.com
This reverts commit 12915156a976fcd0dbafdd06e3d73e860d037200.
The change will be replaced by cb1bb9a736de6aaf48cdccd0b46d98e71201900c backported from linux-6.1 with a future patch.
Signed-off-by: Vincenzo Frascino Vincenzo.Frascino@arm.com --- .../gpu/drm/arm/display/komeda/komeda_crtc.c | 10 ---------- .../gpu/drm/arm/display/komeda/komeda_kms.c | 19 +------------------ .../gpu/drm/arm/display/komeda/komeda_kms.h | 3 --- 3 files changed, 1 insertion(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c index b7f0a5f97222..59172acb9738 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c @@ -227,16 +227,6 @@ void komeda_crtc_handle_event(struct komeda_crtc *kcrtc, complete_all(kcrtc->disable_done); kcrtc->disable_done = NULL; } else if (crtc->state->event) { - if (kcrtc->state_needs_handling) { - event = kcrtc->state_needs_handling->event; - if (event) { - kcrtc->state_needs_handling->event = NULL; - kcrtc->state_needs_handling = NULL; - drm_crtc_send_vblank_event(crtc, event); - } else { - kcrtc->state_needs_handling = NULL; - } - } event = crtc->state->event; /* * Consume event before notifying drm core that flip diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c index bbc051a1896a..93b7f09b96ca 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c @@ -226,27 +226,10 @@ static int komeda_kms_check(struct drm_device *dev, return 0; }
-static int komeda_kms_commit(struct drm_device *drm, - struct drm_atomic_state *state, - bool nonblock) -{ - int i; - struct drm_crtc *crtc; - struct drm_crtc_state *old_crtc_state, *new_crtc_state; - struct komeda_crtc *kcrtc; - - for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, - new_crtc_state, i) { - kcrtc = to_kcrtc(crtc); - kcrtc->state_needs_handling = crtc->state; - } - return drm_atomic_helper_commit(drm, state, nonblock); -} - static const struct drm_mode_config_funcs komeda_mode_config_funcs = { .fb_create = komeda_fb_create, .atomic_check = komeda_kms_check, - .atomic_commit = komeda_kms_commit, + .atomic_commit = drm_atomic_helper_commit, };
static void komeda_kms_mode_config_init(struct komeda_kms_dev *kms, diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h index 8ff3ad04dfe4..456f3c435719 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h @@ -84,9 +84,6 @@ struct komeda_crtc {
/** @disable_done: this flip_done is for tracing the disable */ struct completion *disable_done; - - /** @state_needs_handling: Has not had it's vblank event handled yet */ - struct drm_crtc_state *state_needs_handling; };
/**
From: Liviu Dudau liviu.dudau@arm.com
Komeda driver relies on the generic DRM atomic helper functions to handle commits. It only implements an atomic_commit_tail hook for the mode_config_helper_funcs and even that one is pretty close to the generic implementation with the exception of additional dma_fence signalling.
What the generic helper framework doesn't do is waiting for the actual hardware to signal that the commit parameters have been written into the appropriate registers. As we signal CRTC events only on the irq handlers, we need to flush the configuration and wait for the hardware to respond.
Add the Komeda specific implementation for atomic_commit_hw_done() that flushes and waits for flip done before calling drm_atomic_helper_commit_hw_done().
The fix was prompted by a patch from Carsten Haitzler where he was trying to solve the same issue but in a different way that I think can lead to wrong event signaling to userspace.
Reported-by: Carsten Haitzler carsten.haitzler@arm.com Tested-by: Carsten Haitzler carsten.haitzler@arm.com Reviewed-by: Carsten Haitzler carsten.haitzler@arm.com Signed-off-by: Liviu Dudau liviu.dudau@arm.com Link: https://patchwork.freedesktop.org/patch/msgid/20220722122139.288486-1-liviu.... [Backport to linux-5.18] Signed-off-by: Vincenzo Frascino Vincenzo.Frascino@arm.com --- .../gpu/drm/arm/display/komeda/komeda_crtc.c | 4 ++-- .../gpu/drm/arm/display/komeda/komeda_kms.c | 21 ++++++++++++++++++- .../gpu/drm/arm/display/komeda/komeda_kms.h | 2 ++ 3 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c index 59172acb9738..292f533d8cf0 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c @@ -235,7 +235,7 @@ void komeda_crtc_handle_event(struct komeda_crtc *kcrtc, crtc->state->event = NULL; drm_crtc_send_vblank_event(crtc, event); } else { - DRM_WARN("CRTC[%d]: FLIP happen but no pending commit.\n", + DRM_WARN("CRTC[%d]: FLIP happened but no pending commit.\n", drm_crtc_index(&kcrtc->base)); } spin_unlock_irqrestore(&crtc->dev->event_lock, flags); @@ -286,7 +286,7 @@ komeda_crtc_atomic_enable(struct drm_crtc *crtc, komeda_crtc_do_flush(crtc, old); }
-static void +void komeda_crtc_flush_and_wait_for_flip_done(struct komeda_crtc *kcrtc, struct completion *input_flip_done) { diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c index 93b7f09b96ca..327051bba5b6 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c @@ -69,6 +69,25 @@ static const struct drm_driver komeda_kms_driver = { .minor = 1, };
+static void komeda_kms_atomic_commit_hw_done(struct drm_atomic_state *state) +{ + struct drm_device *dev = state->dev; + struct komeda_kms_dev *kms = to_kdev(dev); + int i; + + for (i = 0; i < kms->n_crtcs; i++) { + struct komeda_crtc *kcrtc = &kms->crtcs[i]; + + if (kcrtc->base.state->active) { + struct completion *flip_done = NULL; + if (kcrtc->base.state->event) + flip_done = kcrtc->base.state->event->base.completion; + komeda_crtc_flush_and_wait_for_flip_done(kcrtc, flip_done); + } + } + drm_atomic_helper_commit_hw_done(state); +} + static void komeda_kms_commit_tail(struct drm_atomic_state *old_state) { struct drm_device *dev = old_state->dev; @@ -81,7 +100,7 @@ static void komeda_kms_commit_tail(struct drm_atomic_state *old_state)
drm_atomic_helper_commit_modeset_enables(dev, old_state);
- drm_atomic_helper_commit_hw_done(old_state); + komeda_kms_atomic_commit_hw_done(old_state);
drm_atomic_helper_wait_for_flip_done(dev, old_state);
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h index 456f3c435719..bf6e8fba5061 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.h +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.h @@ -182,6 +182,8 @@ void komeda_kms_cleanup_private_objs(struct komeda_kms_dev *kms);
void komeda_crtc_handle_event(struct komeda_crtc *kcrtc, struct komeda_events *evts); +void komeda_crtc_flush_and_wait_for_flip_done(struct komeda_crtc *kcrtc, + struct completion *input_flip_done);
struct komeda_kms_dev *komeda_kms_attach(struct komeda_dev *mdev); void komeda_kms_detach(struct komeda_kms_dev *kms);
__drm_legacy_infobufs() and __drm_legacy_mapbufs() are implemented only when CONFIG_DRM_LEGACY is enabled.
Currently the drm_legacy header exposes them indiscriminately.
Fix the issue adding the correct guarding.
Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com --- drivers/gpu/drm/drm_legacy.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_legacy.h b/drivers/gpu/drm/drm_legacy.h index 70c9dba114a6..ea2e27be23ce 100644 --- a/drivers/gpu/drm/drm_legacy.h +++ b/drivers/gpu/drm/drm_legacy.h @@ -146,7 +146,6 @@ int drm_legacy_markbufs(struct drm_device *d, void *v, struct drm_file *f); int drm_legacy_freebufs(struct drm_device *d, void *v, struct drm_file *f); int drm_legacy_mapbufs(struct drm_device *d, void *v, struct drm_file *f); int drm_legacy_dma_ioctl(struct drm_device *d, void *v, struct drm_file *f); -#endif
int __drm_legacy_infobufs(struct drm_device *, void *, int *, int (*)(void *, int, struct drm_buf_entry *)); @@ -154,6 +153,7 @@ int __drm_legacy_mapbufs(struct drm_device *, void *, int *, void __user **, int (*)(void *, int, unsigned long, struct drm_buf *), struct drm_file *); +#endif
#if IS_ENABLED(CONFIG_DRM_LEGACY) void drm_legacy_master_rmmaps(struct drm_device *dev,
With the introduction of capabilities, the PCuABI expects a capability when dealing with the user pointers.
Address a compilation using the proper type to represent user pointers (user_uintptr_t).
Note: The compat handler has been replaced with the relevant helper.
Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com --- drivers/media/cec/core/cec-api.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/media/cec/core/cec-api.c b/drivers/media/cec/core/cec-api.c index d72ad48c9898..aadf1ad8fd79 100644 --- a/drivers/media/cec/core/cec-api.c +++ b/drivers/media/cec/core/cec-api.c @@ -501,7 +501,7 @@ static long cec_s_mode(struct cec_adapter *adap, struct cec_fh *fh, return 0; }
-static long cec_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) +static long cec_ioctl(struct file *filp, unsigned int cmd, user_uintptr_t arg) { struct cec_fh *fh = filp->private_data; struct cec_adapter *adap = fh->adap; @@ -706,7 +706,7 @@ const struct file_operations cec_devnode_fops = { .owner = THIS_MODULE, .open = cec_open, .unlocked_ioctl = cec_ioctl, - .compat_ioctl = cec_ioctl, + .compat_ioctl = compat_ptr_ioctl, .release = cec_release, .poll = cec_poll, .llseek = no_llseek,
On 16/01/2023 16:12, Vincenzo Frascino wrote:
With the introduction of capabilities, the PCuABI expects a capability when dealing with the user pointers.
Address a compilation using the proper type to represent user
It seems there's a word missing, s/compilation/compilation issue/ maybe? Same in patch 8.
Kevin
pointers (user_uintptr_t).
Note: The compat handler has been replaced with the relevant helper.
Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com
drivers/media/cec/core/cec-api.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/media/cec/core/cec-api.c b/drivers/media/cec/core/cec-api.c index d72ad48c9898..aadf1ad8fd79 100644 --- a/drivers/media/cec/core/cec-api.c +++ b/drivers/media/cec/core/cec-api.c @@ -501,7 +501,7 @@ static long cec_s_mode(struct cec_adapter *adap, struct cec_fh *fh, return 0; } -static long cec_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) +static long cec_ioctl(struct file *filp, unsigned int cmd, user_uintptr_t arg) { struct cec_fh *fh = filp->private_data; struct cec_adapter *adap = fh->adap; @@ -706,7 +706,7 @@ const struct file_operations cec_devnode_fops = { .owner = THIS_MODULE, .open = cec_open, .unlocked_ioctl = cec_ioctl,
- .compat_ioctl = cec_ioctl,
- .compat_ioctl = compat_ptr_ioctl, .release = cec_release, .poll = cec_poll, .llseek = no_llseek,
With the introduction of capabilities, the PCuABI expects a capability when dealing with the user pointers.
Address a compilation warning triggered by otherwise implicit conversion that might lead to unexpected behaviour when operating on capabilities.
Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com --- drivers/video/fbdev/core/fbmem.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/video/fbdev/core/fbmem.c b/drivers/video/fbdev/core/fbmem.c index 5ac14a08f624..96769e01b4ee 100644 --- a/drivers/video/fbdev/core/fbmem.c +++ b/drivers/video/fbdev/core/fbmem.c @@ -1296,6 +1296,7 @@ static long fb_compat_ioctl(struct file *file, unsigned int cmd, struct fb_info *info = file_fb_info(file); const struct fb_ops *fb; long ret = -ENOIOCTLCMD; + user_uintptr_t argp;
if (!info) return -ENODEV; @@ -1306,8 +1307,10 @@ static long fb_compat_ioctl(struct file *file, unsigned int cmd, case FBIOPAN_DISPLAY: case FBIOGET_CON2FBMAP: case FBIOPUT_CON2FBMAP: - arg = (unsigned long) compat_ptr(arg); - fallthrough; + argp = (user_uintptr_t) compat_ptr(arg); + ret = do_fb_ioctl(info, cmd, argp); + break; + case FBIOBLANK: ret = do_fb_ioctl(info, cmd, arg); break;
Currently the tda998x driver always includes the hdmi-codec definition. These make sense only when CONFIG_SND_SOC_HDMI_CODEC is enabled.
Address the issue guarding correctly the interested sections of the tda998x driver.
Co-developed-by: Kevin Brodsky kevin.brodsky@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com --- drivers/gpu/drm/i2c/tda998x_drv.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index b7ec6c374fbd..0da792f3dacd 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -10,8 +10,13 @@ #include <linux/module.h> #include <linux/platform_data/tda9950.h> #include <linux/irq.h> +#ifdef CONFIG_SND_SOC_HDMI_CODEC #include <sound/asoundef.h> #include <sound/hdmi-codec.h> +#else +#include <linux/delay.h> +#include <linux/platform_device.h> +#endif
#include <drm/drm_atomic_helper.h> #include <drm/drm_bridge.h> @@ -896,6 +901,7 @@ static const struct tda998x_audio_route tda998x_audio_route[AUDIO_ROUTE_NUM] = { }, };
+#ifdef CONFIG_SND_SOC_HDMI_CODEC /* Configure the TDA998x audio data and clock routing. */ static int tda998x_derive_routing(struct tda998x_priv *priv, struct tda998x_audio_settings *s, @@ -910,6 +916,7 @@ static int tda998x_derive_routing(struct tda998x_priv *priv,
return 0; } +#endif
/* * The audio clock divisor register controls a divider producing Audio_Clk_Out @@ -1059,6 +1066,7 @@ static void tda998x_configure_audio(struct tda998x_priv *priv) tda998x_write_aif(priv, &settings->cea); }
+#ifdef CONFIG_SND_SOC_HDMI_CODEC static int tda998x_audio_hw_params(struct device *dev, void *data, struct hdmi_codec_daifmt *daifmt, struct hdmi_codec_params *params) @@ -1158,7 +1166,9 @@ static int tda998x_audio_get_eld(struct device *dev, void *data,
return 0; } +#endif
+#ifdef CONFIG_SND_SOC_HDMI_CODEC static const struct hdmi_codec_ops audio_codec_ops = { .hw_params = tda998x_audio_hw_params, .audio_shutdown = tda998x_audio_shutdown, @@ -1186,6 +1196,7 @@ static int tda998x_audio_codec_init(struct tda998x_priv *priv,
return PTR_ERR_OR_ZERO(priv->audio_pdev); } +#endif
/* DRM connector functions */
@@ -1975,9 +1986,11 @@ static int tda998x_create(struct device *dev) if (ret) goto fail;
+#ifdef CONFIG_SND_SOC_HDMI_CODEC if (priv->audio_port_enable[AUDIO_ROUTE_I2S] || priv->audio_port_enable[AUDIO_ROUTE_SPDIF]) tda998x_audio_codec_init(priv, &client->dev); +#endif } else if (dev->platform_data) { ret = tda998x_set_config(priv, dev->platform_data); if (ret)
On 16/01/2023 16:12, Vincenzo Frascino wrote:
Currently the tda998x driver always includes the hdmi-codec definition. These make sense only when CONFIG_SND_SOC_HDMI_CODEC is enabled.
Address the issue guarding correctly the interested sections of the tda998x driver.
Co-developed-by: Kevin Brodsky kevin.brodsky@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com
drivers/gpu/drm/i2c/tda998x_drv.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index b7ec6c374fbd..0da792f3dacd 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -10,8 +10,13 @@ #include <linux/module.h> #include <linux/platform_data/tda9950.h> #include <linux/irq.h> +#ifdef CONFIG_SND_SOC_HDMI_CODEC #include <sound/asoundef.h> #include <sound/hdmi-codec.h> +#else +#include <linux/delay.h> +#include <linux/platform_device.h> +#endif #include <drm/drm_atomic_helper.h> #include <drm/drm_bridge.h> @@ -896,6 +901,7 @@ static const struct tda998x_audio_route tda998x_audio_route[AUDIO_ROUTE_NUM] = { }, }; +#ifdef CONFIG_SND_SOC_HDMI_CODEC /* Configure the TDA998x audio data and clock routing. */ static int tda998x_derive_routing(struct tda998x_priv *priv, struct tda998x_audio_settings *s, @@ -910,6 +916,7 @@ static int tda998x_derive_routing(struct tda998x_priv *priv, return 0; } +#endif /*
- The audio clock divisor register controls a divider producing Audio_Clk_Out
@@ -1059,6 +1066,7 @@ static void tda998x_configure_audio(struct tda998x_priv *priv) tda998x_write_aif(priv, &settings->cea); } +#ifdef CONFIG_SND_SOC_HDMI_CODEC static int tda998x_audio_hw_params(struct device *dev, void *data, struct hdmi_codec_daifmt *daifmt, struct hdmi_codec_params *params) @@ -1158,7 +1166,9 @@ static int tda998x_audio_get_eld(struct device *dev, void *data, return 0; } +#endif +#ifdef CONFIG_SND_SOC_HDMI_CODEC
Nit: I suppose we don't need this #ifdef and the #endif above, as it all forms just one (logical) block?
static const struct hdmi_codec_ops audio_codec_ops = { .hw_params = tda998x_audio_hw_params, .audio_shutdown = tda998x_audio_shutdown, @@ -1186,6 +1196,7 @@ static int tda998x_audio_codec_init(struct tda998x_priv *priv, return PTR_ERR_OR_ZERO(priv->audio_pdev); } +#endif
Nit: /* CONFIG_SND_SOC_HDMI_CODEC */ (the block is big so hard to see where it starts)
Kevin
/* DRM connector functions */ @@ -1975,9 +1986,11 @@ static int tda998x_create(struct device *dev) if (ret) goto fail; +#ifdef CONFIG_SND_SOC_HDMI_CODEC if (priv->audio_port_enable[AUDIO_ROUTE_I2S] || priv->audio_port_enable[AUDIO_ROUTE_SPDIF]) tda998x_audio_codec_init(priv, &client->dev); +#endif } else if (dev->platform_data) { ret = tda998x_set_config(priv, dev->platform_data); if (ret)
On 16/01/2023 16:12, Vincenzo Frascino wrote:
Currently the tda998x driver always includes the hdmi-codec definition. These make sense only when CONFIG_SND_SOC_HDMI_CODEC is enabled.
Address the issue guarding correctly the interested sections of the tda998x driver.
Co-developed-by: Kevin Brodsky kevin.brodsky@arm.com
Forgot to mention:
Signed-off-by: Kevin Brodsky kevin.brodsky@arm.com
Kevin
Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com
drivers/gpu/drm/i2c/tda998x_drv.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index b7ec6c374fbd..0da792f3dacd 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -10,8 +10,13 @@ #include <linux/module.h> #include <linux/platform_data/tda9950.h> #include <linux/irq.h> +#ifdef CONFIG_SND_SOC_HDMI_CODEC #include <sound/asoundef.h> #include <sound/hdmi-codec.h> +#else +#include <linux/delay.h> +#include <linux/platform_device.h> +#endif #include <drm/drm_atomic_helper.h> #include <drm/drm_bridge.h> @@ -896,6 +901,7 @@ static const struct tda998x_audio_route tda998x_audio_route[AUDIO_ROUTE_NUM] = { }, }; +#ifdef CONFIG_SND_SOC_HDMI_CODEC /* Configure the TDA998x audio data and clock routing. */ static int tda998x_derive_routing(struct tda998x_priv *priv, struct tda998x_audio_settings *s, @@ -910,6 +916,7 @@ static int tda998x_derive_routing(struct tda998x_priv *priv, return 0; } +#endif /*
- The audio clock divisor register controls a divider producing Audio_Clk_Out
@@ -1059,6 +1066,7 @@ static void tda998x_configure_audio(struct tda998x_priv *priv) tda998x_write_aif(priv, &settings->cea); } +#ifdef CONFIG_SND_SOC_HDMI_CODEC static int tda998x_audio_hw_params(struct device *dev, void *data, struct hdmi_codec_daifmt *daifmt, struct hdmi_codec_params *params) @@ -1158,7 +1166,9 @@ static int tda998x_audio_get_eld(struct device *dev, void *data, return 0; } +#endif +#ifdef CONFIG_SND_SOC_HDMI_CODEC static const struct hdmi_codec_ops audio_codec_ops = { .hw_params = tda998x_audio_hw_params, .audio_shutdown = tda998x_audio_shutdown, @@ -1186,6 +1196,7 @@ static int tda998x_audio_codec_init(struct tda998x_priv *priv, return PTR_ERR_OR_ZERO(priv->audio_pdev); } +#endif /* DRM connector functions */ @@ -1975,9 +1986,11 @@ static int tda998x_create(struct device *dev) if (ret) goto fail; +#ifdef CONFIG_SND_SOC_HDMI_CODEC if (priv->audio_port_enable[AUDIO_ROUTE_I2S] || priv->audio_port_enable[AUDIO_ROUTE_SPDIF]) tda998x_audio_codec_init(priv, &client->dev); +#endif } else if (dev->platform_data) { ret = tda998x_set_config(priv, dev->platform_data); if (ret)
With the introduction of capabilities, the PCuABI expects a capability when dealing with the user pointers.
Address a compilation using the proper type to represent user pointers (user_uintptr_t).
Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com --- drivers/rtc/dev.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/rtc/dev.c b/drivers/rtc/dev.c index 69325aeede1a..d2c075014c68 100644 --- a/drivers/rtc/dev.c +++ b/drivers/rtc/dev.c @@ -201,7 +201,7 @@ static __poll_t rtc_dev_poll(struct file *file, poll_table *wait) }
static long rtc_dev_ioctl(struct file *file, - unsigned int cmd, unsigned long arg) + unsigned int cmd, user_uintptr_t arg) { int err = 0; struct rtc_device *rtc = file->private_data; @@ -488,7 +488,7 @@ static long rtc_dev_compat_ioctl(struct file *file, return rtc_dev_ioctl(file, RTC_EPOCH_SET, arg); }
- return rtc_dev_ioctl(file, cmd, (unsigned long)uarg); + return rtc_dev_ioctl(file, cmd, (user_uintptr_t)uarg); } #endif
Enable the required options to have a graphic environment running on a Morello SoC in the default defconfig for Morello Transitional PCUABI (morello_transitional_pcuabi_defconfig): - CONFIG_DRM=y - CONFIG_DRM_PANFROST=y - CONFIG_DRM_KOMEDA=y - CONFIG_DRM_I2C_NXP_TDA998X=y - CONFIG_DRM_I2C_NXP_TDA9950=y - CONFIG_DRM_LOAD_EDID_FIRMWARE=y - CONFIG_FB=y - CONFIG_FB_EFI=y - CONFIG_I2C_CADENCE=y
Co-developed-by: Carsten Haitzler Carsten.Haitzler@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com --- arch/arm64/configs/morello_transitional_pcuabi_defconfig | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm64/configs/morello_transitional_pcuabi_defconfig b/arch/arm64/configs/morello_transitional_pcuabi_defconfig index 2c0798c18553..35ed99784b77 100644 --- a/arch/arm64/configs/morello_transitional_pcuabi_defconfig +++ b/arch/arm64/configs/morello_transitional_pcuabi_defconfig @@ -106,8 +106,17 @@ CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y +CONFIG_I2C_CADENCE=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_DRM=y +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_I2C_NXP_TDA998X=y +CONFIG_DRM_I2C_NXP_TDA9950=y +CONFIG_DRM_KOMEDA=y +CONFIG_DRM_PANFROST=y +CONFIG_FB=y +CONFIG_FB_EFI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_STORAGE=y
ACK
Singed-off-by: Carsten Haitzler Carsten.Haitzler@arm.com
On 1/16/23 15:12, Vincenzo Frascino wrote:
Enable the required options to have a graphic environment running on a Morello SoC in the default defconfig for Morello Transitional PCUABI (morello_transitional_pcuabi_defconfig):
- CONFIG_DRM=y
- CONFIG_DRM_PANFROST=y
- CONFIG_DRM_KOMEDA=y
- CONFIG_DRM_I2C_NXP_TDA998X=y
- CONFIG_DRM_I2C_NXP_TDA9950=y
- CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_FB=y
- CONFIG_FB_EFI=y
- CONFIG_I2C_CADENCE=y
Co-developed-by: Carsten Haitzler Carsten.Haitzler@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com
arch/arm64/configs/morello_transitional_pcuabi_defconfig | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm64/configs/morello_transitional_pcuabi_defconfig b/arch/arm64/configs/morello_transitional_pcuabi_defconfig index 2c0798c18553..35ed99784b77 100644 --- a/arch/arm64/configs/morello_transitional_pcuabi_defconfig +++ b/arch/arm64/configs/morello_transitional_pcuabi_defconfig @@ -106,8 +106,17 @@ CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIRTIO=y +CONFIG_I2C_CADENCE=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_DRM=y +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_I2C_NXP_TDA998X=y +CONFIG_DRM_I2C_NXP_TDA9950=y +CONFIG_DRM_KOMEDA=y +CONFIG_DRM_PANFROST=y +CONFIG_FB=y +CONFIG_FB_EFI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_STORAGE=y
Enable the required options to have the real time clock (RTC) working on a Morello SoC in the default defconfig for Morello Transitional PCUABI (morello_transitional_pcuabi_defconfig): - CONFIG_RTC_CLASS=y - CONFIG_RTC_DRV_EFI=y
Co-developed-by: Carsten Haitzler Carsten.Haitzler@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com --- arch/arm64/configs/morello_transitional_pcuabi_defconfig | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/morello_transitional_pcuabi_defconfig b/arch/arm64/configs/morello_transitional_pcuabi_defconfig index 35ed99784b77..7b15c99c48ba 100644 --- a/arch/arm64/configs/morello_transitional_pcuabi_defconfig +++ b/arch/arm64/configs/morello_transitional_pcuabi_defconfig @@ -123,6 +123,8 @@ CONFIG_USB_STORAGE=y CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_ARMMMCI=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_EFI=y CONFIG_VIRTIO_MMIO=y CONFIG_ARM_SMMU_V3=y CONFIG_MEMORY=y
ACK
Singed-off-by: Carsten Haitzler Carsten.Haitzler@arm.com
On 1/16/23 15:12, Vincenzo Frascino wrote:
Enable the required options to have the real time clock (RTC) working on a Morello SoC in the default defconfig for Morello Transitional PCUABI (morello_transitional_pcuabi_defconfig):
- CONFIG_RTC_CLASS=y
- CONFIG_RTC_DRV_EFI=y
Co-developed-by: Carsten Haitzler Carsten.Haitzler@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com
arch/arm64/configs/morello_transitional_pcuabi_defconfig | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/morello_transitional_pcuabi_defconfig b/arch/arm64/configs/morello_transitional_pcuabi_defconfig index 35ed99784b77..7b15c99c48ba 100644 --- a/arch/arm64/configs/morello_transitional_pcuabi_defconfig +++ b/arch/arm64/configs/morello_transitional_pcuabi_defconfig @@ -123,6 +123,8 @@ CONFIG_USB_STORAGE=y CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_ARMMMCI=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_EFI=y CONFIG_VIRTIO_MMIO=y CONFIG_ARM_SMMU_V3=y CONFIG_MEMORY=y
On 16/01/2023 16:12, Vincenzo Frascino wrote:
Enable the required config options to run panfrost/komeda in the default defconfig for Morello Transitional PureCap User ABI (PCuABI) (morello_transitional_pcuabi_defconfig).
Note: The series was verified only by CI and at framebuffer level. Further testing is required to exercise all the components.
As agreed, will wait for Carsten's further testing before merging.
I've got a few nits on patch 5, 7 and 8, they are all very small and non-functional so happy to fix them myself when merging if you agree and prefer that.
I will add my Signed-off-by on patch 7, and will wait for Carsten to reply with his on on patch 1, 9 and 10.
Cheers, Kevin
To simplify future testing of this series the complete patch set applied on top of recent morello kernel can be found at [1].
[1] https://git.morello-project.org/vincenzo/linux morello/drm/v1
Co-developed-by: Kevin Brodsky kevin.brodsky@arm.com Co-developed-by: Carsten Haitzler Carsten.Haitzler@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com
Liviu Dudau (1): drm/komeda: Fix handling of atomic commits in the atomic_commit_tail hook
Vincenzo Frascino (9): morello: dt: Add support for the FVP, SoC Revert "drm/komeda - Fix handling of pending crtc state commit to avoid lock-up" drm: drm_legacy: Fix CONFIG_DRM_LEGACY guards in drm_legacy.h media: cec: Use proper type to represent user pointers fbdev: Use proper typecast for capability type drm: i2c: Include hdmi-codec definitions only when required rtc: Use proper type to represent user pointers morello: Enable GPU/DPU in defconfig morello: Enable RTC support
arch/arm64/boot/dts/arm/Makefile | 1 + arch/arm64/boot/dts/arm/morello-fvp.dts | 171 +++++++++++ arch/arm64/boot/dts/arm/morello-soc.dts | 278 ++++++++++++++++++ arch/arm64/boot/dts/arm/morello.dtsi | 124 ++++++++ .../morello_transitional_pcuabi_defconfig | 11 + .../gpu/drm/arm/display/komeda/komeda_crtc.c | 14 +- .../gpu/drm/arm/display/komeda/komeda_kms.c | 40 +-- .../gpu/drm/arm/display/komeda/komeda_kms.h | 5 +- drivers/gpu/drm/drm_legacy.h | 2 +- drivers/gpu/drm/i2c/tda998x_drv.c | 13 + drivers/media/cec/core/cec-api.c | 4 +- drivers/rtc/dev.c | 4 +- drivers/video/fbdev/core/fbmem.c | 7 +- 13 files changed, 633 insertions(+), 41 deletions(-) create mode 100644 arch/arm64/boot/dts/arm/morello-fvp.dts create mode 100644 arch/arm64/boot/dts/arm/morello-soc.dts create mode 100644 arch/arm64/boot/dts/arm/morello.dtsi
On 17/01/2023 09:02, Kevin Brodsky wrote:
On 16/01/2023 16:12, Vincenzo Frascino wrote:
Enable the required config options to run panfrost/komeda in the default defconfig for Morello Transitional PureCap User ABI (PCuABI) (morello_transitional_pcuabi_defconfig).
Note: The series was verified only by CI and at framebuffer level. Further testing is required to exercise all the components.
As agreed, will wait for Carsten's further testing before merging.
I've got a few nits on patch 5, 7 and 8, they are all very small and non-functional so happy to fix them myself when merging if you agree and prefer that.
I will add my Signed-off-by on patch 7, and will wait for Carsten to reply with his on on patch 1, 9 and 10.
Fine by me. But I think you should give your Signed-off under Co-developed-by independently if you are fine with providing it.
Vincenzo
Cheers, Kevin
To simplify future testing of this series the complete patch set applied on top of recent morello kernel can be found at [1].
[1] https://git.morello-project.org/vincenzo/linux morello/drm/v1
Co-developed-by: Kevin Brodsky kevin.brodsky@arm.com Co-developed-by: Carsten Haitzler Carsten.Haitzler@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com
Liviu Dudau (1): drm/komeda: Fix handling of atomic commits in the atomic_commit_tail hook
Vincenzo Frascino (9): morello: dt: Add support for the FVP, SoC Revert "drm/komeda - Fix handling of pending crtc state commit to avoid lock-up" drm: drm_legacy: Fix CONFIG_DRM_LEGACY guards in drm_legacy.h media: cec: Use proper type to represent user pointers fbdev: Use proper typecast for capability type drm: i2c: Include hdmi-codec definitions only when required rtc: Use proper type to represent user pointers morello: Enable GPU/DPU in defconfig morello: Enable RTC support
arch/arm64/boot/dts/arm/Makefile | 1 + arch/arm64/boot/dts/arm/morello-fvp.dts | 171 +++++++++++ arch/arm64/boot/dts/arm/morello-soc.dts | 278 ++++++++++++++++++ arch/arm64/boot/dts/arm/morello.dtsi | 124 ++++++++ .../morello_transitional_pcuabi_defconfig | 11 + .../gpu/drm/arm/display/komeda/komeda_crtc.c | 14 +- .../gpu/drm/arm/display/komeda/komeda_kms.c | 40 +-- .../gpu/drm/arm/display/komeda/komeda_kms.h | 5 +- drivers/gpu/drm/drm_legacy.h | 2 +- drivers/gpu/drm/i2c/tda998x_drv.c | 13 + drivers/media/cec/core/cec-api.c | 4 +- drivers/rtc/dev.c | 4 +- drivers/video/fbdev/core/fbmem.c | 7 +- 13 files changed, 633 insertions(+), 41 deletions(-) create mode 100644 arch/arm64/boot/dts/arm/morello-fvp.dts create mode 100644 arch/arm64/boot/dts/arm/morello-soc.dts create mode 100644 arch/arm64/boot/dts/arm/morello.dtsi
ACK
As a general series-wide review. This doesn't fully work yet. GPU doesn't come up due to some DRM problems in-kernel that need addressing. Also we have no proper working input for normal devices like keyboard and mouse in general. I have 2 patches coming that fix the latter issue that should go along with this series and then will have more patches later to bring up GPU. At this stage Xorg doesn't work and weston/wayland works without accel with my input patches added to this. Other than this a general for all in this series:
Tested-by: Carsten Haitzler Carsten.Haitzler@arm.com
On 1/16/23 15:12, Vincenzo Frascino wrote:
Enable the required config options to run panfrost/komeda in the default defconfig for Morello Transitional PureCap User ABI (PCuABI) (morello_transitional_pcuabi_defconfig).
Note: The series was verified only by CI and at framebuffer level. Further testing is required to exercise all the components.
To simplify future testing of this series the complete patch set applied on top of recent morello kernel can be found at [1].
[1] https://git.morello-project.org/vincenzo/linux morello/drm/v1
Co-developed-by: Kevin Brodsky kevin.brodsky@arm.com Co-developed-by: Carsten Haitzler Carsten.Haitzler@arm.com Signed-off-by: Vincenzo Frascino vincenzo.frascino@arm.com
Liviu Dudau (1): drm/komeda: Fix handling of atomic commits in the atomic_commit_tail hook
Vincenzo Frascino (9): morello: dt: Add support for the FVP, SoC Revert "drm/komeda - Fix handling of pending crtc state commit to avoid lock-up" drm: drm_legacy: Fix CONFIG_DRM_LEGACY guards in drm_legacy.h media: cec: Use proper type to represent user pointers fbdev: Use proper typecast for capability type drm: i2c: Include hdmi-codec definitions only when required rtc: Use proper type to represent user pointers morello: Enable GPU/DPU in defconfig morello: Enable RTC support
arch/arm64/boot/dts/arm/Makefile | 1 + arch/arm64/boot/dts/arm/morello-fvp.dts | 171 +++++++++++ arch/arm64/boot/dts/arm/morello-soc.dts | 278 ++++++++++++++++++ arch/arm64/boot/dts/arm/morello.dtsi | 124 ++++++++ .../morello_transitional_pcuabi_defconfig | 11 + .../gpu/drm/arm/display/komeda/komeda_crtc.c | 14 +- .../gpu/drm/arm/display/komeda/komeda_kms.c | 40 +-- .../gpu/drm/arm/display/komeda/komeda_kms.h | 5 +- drivers/gpu/drm/drm_legacy.h | 2 +- drivers/gpu/drm/i2c/tda998x_drv.c | 13 + drivers/media/cec/core/cec-api.c | 4 +- drivers/rtc/dev.c | 4 +- drivers/video/fbdev/core/fbmem.c | 7 +- 13 files changed, 633 insertions(+), 41 deletions(-) create mode 100644 arch/arm64/boot/dts/arm/morello-fvp.dts create mode 100644 arch/arm64/boot/dts/arm/morello-soc.dts create mode 100644 arch/arm64/boot/dts/arm/morello.dtsi
On 24/01/2023 15:06, Carsten Haitzler wrote:
ACK
As a general series-wide review. This doesn't fully work yet. GPU doesn't come up due to some DRM problems in-kernel that need addressing. Also we have no proper working input for normal devices like keyboard and mouse in general. I have 2 patches coming that fix the latter issue that should go along with this series and then will have more patches later to bring up GPU. At this stage Xorg doesn't work and weston/wayland works without accel with my input patches added to this.
Thanks for the testing and the update! I've got a couple of nits on your input patches, when you send the v2 I'll merge them together with this series.
Other than this a general for all in this series:
Tested-by: Carsten Haitzler Carsten.Haitzler@arm.com
Will add to each patch when merging.
Kevin
Hi Kevin,
On 24/01/2023 17:04, Kevin Brodsky wrote:
On 24/01/2023 15:06, Carsten Haitzler wrote:
ACK
As a general series-wide review. This doesn't fully work yet. GPU doesn't come up due to some DRM problems in-kernel that need addressing. Also we have no proper working input for normal devices like keyboard and mouse in general. I have 2 patches coming that fix the latter issue that should go along with this series and then will have more patches later to bring up GPU. At this stage Xorg doesn't work and weston/wayland works without accel with my input patches added to this.
Thanks for the testing and the update! I've got a couple of nits on your input patches, when you send the v2 I'll merge them together with this series.
Other than this a general for all in this series:
Tested-by: Carsten Haitzler Carsten.Haitzler@arm.com
Will add to each patch when merging.
Just to avoid misunderstanding, this series need to go in first and the changes Carsten posted separately (even if they are merged at the same time).
Kevin
On 24/01/2023 18:04, Kevin Brodsky wrote:
On 24/01/2023 15:06, Carsten Haitzler wrote:
ACK
As a general series-wide review. This doesn't fully work yet. GPU doesn't come up due to some DRM problems in-kernel that need addressing. Also we have no proper working input for normal devices like keyboard and mouse in general. I have 2 patches coming that fix the latter issue that should go along with this series and then will have more patches later to bring up GPU. At this stage Xorg doesn't work and weston/wayland works without accel with my input patches added to this.
Thanks for the testing and the update! I've got a couple of nits on your input patches, when you send the v2 I'll merge them together with this series.
Other than this a general for all in this series:
Tested-by: Carsten Haitzler Carsten.Haitzler@arm.com
Will add to each patch when merging.
Now applied on next with the discussed changes and added tags, thanks Vincenzo and Carsten!
Kevin
linux-morello@op-lists.linaro.org
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Carsten Haitzler -
Kevin Brodsky -
Vincenzo Frascino