Generate arm64 bytecode to zero general purpose regs.
This can be used to sanitise regs after domain transitions between the kernel and eBPF compartments.
Signed-off-by: Zachary Leaf zachary.leaf@arm.com --- arch/arm64/net/bpf_jit_comp.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c index 920c1bfd098e..7f1f6e09ea53 100644 --- a/arch/arm64/net/bpf_jit_comp.c +++ b/arch/arm64/net/bpf_jit_comp.c @@ -284,6 +284,21 @@ static bool is_lsi_offset(int offset, int scale) /* Offset of nop instruction in bpf prog entry to be poked */ #define POKE_OFFSET (BTI_INSNS + 1)
+static inline void zero_gpr(struct jit_ctx *ctx) +{ + /* + * Try generating this without repeating yourself using + * emit(A64_MOVZ(1, A64_R(0), 0, 0), ctx); + * ... + */ + int base = 0xd2800000; // mov x0, #0 + // 0xd2800001; // mov x1, #0 + // ... + // 0xd280001d; // mov x29, #0 + for(int i=0; i<=29; i++) + emit(base+i, ctx); +} + static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf) { const struct bpf_prog *prog = ctx->prog;