Hi,
I'm submitting this patch on behalf of Benjamin Teoh benjamin.teoh@arm.com.
Regression testing on aarch64-none-elf showed the patch needed the expected disassembly for an existing test changing, I'll submit that as a follow-on fix in 2/2.
OK for users/ARM/morello-binutils-gdb-master?
Thanks, Alex
-- >8 --
When an adrp instruction references a symbol that is more than a page in memory behind the instruction, it would have a negative offset. An example of this is:
foo: nop .zero 4096 adrp c0, foo
where adrp references 'foo' that is more than a page in memory behind it.
In the case where the offset is negative, when translating from its binary format, the offset was seen as an unsigned integer, which caused a spurious high bit set in the resolved address in the adrp instruction like in:
0000000000400078 <foo>: 400078: d503201f nop ... 40107c: f0ffffe0 adrp c0, 100400000 <__bss_end__+0xfffeeff8>
There was an issue with how the imm field of the adrp instruction was extracted in `aarch64_ext_imm`. The value was not sign extended correctly for capability mode targets. This was caused by the imm field having its `P` bit being removed before the sign extension, which is exclusive to 64-bit capability targets. This was remedied by shortening the width of the imm field before sign extending the imm value, resulting in:
0000000000400078 <foo>: 400078: d503201f nop ... 40107c: f0ffffe0 adrp c0, 400000 <foo-0x78>