diff --git a/binutils/testsuite/lib/binutils-common.exp b/binutils/testsuite/lib/binutils-common.exp
index 422cb327e0e59e61a86fc4712e6ba3db4cb3edcd..a4deb7ad39b933bff33520c42c0002189ca439f0 100644
--- a/binutils/testsuite/lib/binutils-common.exp
+++ b/binutils/testsuite/lib/binutils-common.exp
@@ -465,7 +465,7 @@ proc regexp_diff { file_1 file_2 args } {
 		}
 		foreach {name value} $extra_subst {
 		    set value [eval $value];
-		    regsub -- $name $line_bx $value line_bx
+		    regsub -all -- $name $line_bx $value line_bx
 		}
 		verbose "looking for $n\"^$line_bx$\"" 3
 		while { [expr [regexp "^$line_bx$" "$line_a" PREVMATCH {*}$extra_vars] == $negated] } {
@@ -489,7 +489,7 @@ proc regexp_diff { file_1 file_2 args } {
 		    }
 		    foreach {name value} $extra_subst {
 		        set value [eval $value];
-			regsub -- $name $line_bx $value line_bx
+			regsub -all -- $name $line_bx $value line_bx
 		    }
 		    verbose "optional match for $n\"^$line_bx$\"" 3
 		    if { [expr [regexp "^$line_bx$" "$line_a" PREVMATCH {*}$extra_vars] != $negated] } {
@@ -555,7 +555,7 @@ proc regexp_diff { file_1 file_2 args } {
 		set value [eval $value];
 		# send_user "match:       $name\n"
 		# send_user "replacement: $value\n"
-		regsub -- $name $line_bx $value line_bx
+		regsub -all -- $name $line_bx $value line_bx
 	    }
 	    # send_user "checking against $line_bx\n"
 	    verbose "regexp $n\"^$line_bx$\"\nline   \"$line_a\"" 3
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index a4d5495b22ea9913d4ce6da98aadcb3289b77da2..c48164d9cb358e4eb5f21fbdebe20f3610cdf3be 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -99,13 +99,16 @@ proc aarch64_required_func_addend { base result } {
 proc aarch64_page_plus_offset { page offset } {
   return [format %x [expr "0x$page + 0x$offset"] ];
 }
+proc aarch64_page_plus_decimal_offset { page offset } {
+  return [format %x [expr "0x$page + $offset"] ];
+}
 
 # Return the 8-hexdigit truncation of an address.
 proc aarch64_8digit_addr { addr { plusLSB 0 } } {
   if { $plusLSB } {
     return [aarch64_8digit_addr [format %08x [expr "0x$addr + 1"]]];
   }
-  return [string range "$addr" end-7 end];
+  return [format %08x "0x$addr"];
 }
 
 set eh-frame-merge-lp64 [list [list "EH Frame merge" \
diff --git a/ld/testsuite/ld-aarch64/c64-ifunc-3a.d b/ld/testsuite/ld-aarch64/c64-ifunc-3a.d
index bd36b23545e800cd5d952d730ac36ad3c40d0a31..7690b42edd576039c6e455fcf5bb7a480ee0f8bd 100644
--- a/ld/testsuite/ld-aarch64/c64-ifunc-3a.d
+++ b/ld/testsuite/ld-aarch64/c64-ifunc-3a.d
@@ -5,7 +5,11 @@
 #objdump: -dw
 
 #...
-0+(150|1d0|1e8|200) <__GI_foo>:
+Disassembly of section \.text:
+
+#record: INDIRECT_FOO
+([0-9a-f]+) <__GI_foo>:
+#check: FOO_POS format %x 0x$INDIRECT_FOO
 #...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(150|1d0|1e8|200)@plt>
+[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0xFOO_POS@plt>
 #pass
diff --git a/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-1.d b/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-1.d
index b8474f996fee97befacaf2f3366e2f1ef6a6885d..a5f0d9696cd849a3b092263e8fa09daaa6628869 100644
--- a/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-1.d
+++ b/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-1.d
@@ -11,9 +11,13 @@
 
 Sections:
 Idx Name          Size      VMA               LMA               File off  Algn
-  0 \.rela\.dyn     00000018  0000000000000000  0000000000000000  00010000  2\*\*3
+#record: RELADYN_START
+  0 \.rela\.dyn     00000018  ([0-9a-f]+)  .*  .*  2\*\*3
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
+
+#check: STARTPOS string tolower $RELADYN_START
+#check: ENDPOS format %016x [expr "0x$RELADYN_START + 0x18"]
 SYMBOL TABLE:
-0000000000000000 l    d  \.rela\.dyn	0000000000000000 \.rela\.dyn
-0000000000000018 l     O \.rela\.dyn	0000000000000000 __rela_dyn_end
-0000000000000000 l     O \.rela\.dyn	0000000000000000 __rela_dyn_start
+STARTPOS l    d  \.rela\.dyn	0000000000000000 \.rela\.dyn
+ENDPOS l     O \.rela\.dyn	0000000000000000 __rela_dyn_end
+STARTPOS l     O \.rela\.dyn	0000000000000000 __rela_dyn_start
diff --git a/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-2.d b/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-2.d
index f65f859deaa51c442079a4b0b4598b499b32e4bc..e855bc55a4fd91579250ba069c91314446162eb9 100644
--- a/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-2.d
+++ b/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-2.d
@@ -12,14 +12,17 @@
 
 Sections:
 Idx Name          Size      VMA               LMA               File off  Algn
-  0 \.rela\.dyn     00000030  0000000000000000  0000000000000000  00010000  .*
+#record: RELADYN_START
+  0 \.rela\.dyn     00000030  ([0-9a-f]+)  .*  .*  .*
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
   .* \.got .*
 .*
 
+#check: STARTPOS string tolower $RELADYN_START
+#check: ENDPOS format %016x [expr "0x$RELADYN_START + 0x30"]
 SYMBOL TABLE:
-0000000000000000 l    d  \.rela\.dyn	0000000000000000 \.rela\.dyn
+STARTPOS l    d  \.rela\.dyn	0000000000000000 \.rela\.dyn
 .*
-0000000000000030 l     O \.rela\.dyn	0000000000000000 __rela_dyn_end
-0000000000000000 l     O \.rela\.dyn	0000000000000000 __rela_dyn_start
+ENDPOS l     O \.rela\.dyn	0000000000000000 __rela_dyn_end
+STARTPOS l     O \.rela\.dyn	0000000000000000 __rela_dyn_start
 #pass
diff --git a/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-3.d b/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-3.d
index ea373cd24260c330ef92e836705fafc0392fd74b..e60908921b0246f184e5a481f9e288b0ac8bb9e9 100644
--- a/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-3.d
+++ b/ld/testsuite/ld-aarch64/emit-morello-reloc-markers-3.d
@@ -12,14 +12,17 @@
 
 Sections:
 Idx Name          Size      VMA               LMA               File off  Algn
-  0 \.rela\.dyn     00000018  0000000000000000  0000000000000000  00010000  .*
+#record: RELADYN_START
+  0 \.rela\.dyn     00000018  ([0-9a-f]+)  .*  .*  .*
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
   .* \.got .*
 .*
 
+#check: STARTPOS string tolower $RELADYN_START
+#check: ENDPOS format %016x [expr "0x$RELADYN_START + 0x18"]
 SYMBOL TABLE:
-0000000000000000 l    d  \.rela\.dyn	0000000000000000 \.rela\.dyn
+STARTPOS l    d  \.rela\.dyn	0000000000000000 \.rela\.dyn
 .*
-0000000000000018 l     O \.rela\.dyn	0000000000000000 __rela_dyn_end
-0000000000000000 l     O \.rela\.dyn	0000000000000000 __rela_dyn_start
+ENDPOS l     O \.rela\.dyn	0000000000000000 __rela_dyn_end
+STARTPOS l     O \.rela\.dyn	0000000000000000 __rela_dyn_start
 #pass
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-morello-7.d b/ld/testsuite/ld-aarch64/emit-relocs-morello-7.d
index c32d307eb7e05d5c5d06944f09b823246f8e9474..0421fea138762b2431611966f1084b44c0bc8ab4 100644
--- a/ld/testsuite/ld-aarch64/emit-relocs-morello-7.d
+++ b/ld/testsuite/ld-aarch64/emit-relocs-morello-7.d
@@ -10,58 +10,80 @@
 # we want to ensure a direct link between the relevant relocations and their
 # GOT entries.
 #
-# Point here is that the __text_start and __data_other symbols should end up
-# pointing into the text section, which should mean that they have PCC bounds
-# and the value of the __data_other symbol should include an addend.  These are
-# the symbols used in the first and last LDR's in the function.
+# As far as the linker is concerned, each of the symbols defined in our linker
+# script are associated with the output section just before them.  However, we
+# add a hack for symbols which are named in the pattern __*_start so that their
+# Morello bounds are given as if the symbol was associated with the section just
+# after them.
+#
+# Hence the __text_start and __data_other symbols should end up with permissions
+# for the text section.  This should mean that they have PCC bounds, and the
+# value of the __data_other symbol should include an addend.  These are the
+# symbols used in the first and last LDR instructions in the function.
 #
 # Meanwhile, the __text_other symbol should have bounds of everything remaining
 # in the section *before* it (which is nothing), and the __data_start symbol
-# should have bounds spanning the entire section *after* it (which happens to
-# be the .interp section).
+# should have bounds spanning the entire section *after* it (the .data section).
 #
 #source: emit-relocs-morello-7.s
 #as: -march=morello+c64
 #ld: -static -pie -T emit-relocs-morello-7.ld
-#objdump: -DR -j .text -j .data -j .got
+#objdump: -DR --section-headers -j .text -j .got -j .data
 
 .*:     file format .*
 
+Sections:
+Idx Name          Size      VMA               LMA               File off  Algn
+#record: TEXT_START
+.* .text         00000010  ([0-9a-f]+)  .*  .*  2\*\*2
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+#record: DATA_START
+.* .data         00000004  ([0-9a-f]+)  .*  .*  2\*\*0
+                  CONTENTS, ALLOC, LOAD, DATA
+.* .got          00000050  0000000000001000  0000000000001000  00001000  2\*\*4
+                  CONTENTS, ALLOC, LOAD, DATA
+
+#check: TXT_START string tolower $TEXT_START
+#check: DTA_START string tolower $DATA_START
 
 Disassembly of section \.text:
 
-0000000000000230 <obj>:
+TXT_START <obj>:
 .*:	c2400400 	ldr	c0, \[c0, #16\]
 .*:	c2401000 	ldr	c0, \[c0, #64\]
 .*:	c2400c00 	ldr	c0, \[c0, #48\]
 .*:	c2400800 	ldr	c0, \[c0, #32\]
 
+
 Disassembly of section \.data:
 
-.* <\.data>:
+DTA_START <\.data>:
 .*:	0000000a 	.*
 
 Disassembly of section \.got:
 
+#check: PCC_START aarch64_8digit_addr $TEXT_START
+#check: DAT_START aarch64_8digit_addr $DATA_START
+#check: PCC_LENGTH aarch64_8digit_addr [format %x [expr "0x1050 - 0x$TEXT_START"]]
 0000000000001000 <\.got>:
     1000:	[0-9a-f]+ 	.*
 	\.\.\.
-    1010:	00000230 	.*
+    1010:	PCC_START 	.*
 			1010: R_MORELLO_RELATIVE	\*ABS\*
     1014:	00000000 	.*
-    1018:	00000e20 	.*
+    1018:	PCC_LENGTH 	.*
     101c:	04000000 	.*
-    1020:	00000230 	.*
+    1020:	PCC_START 	.*
 			1020: R_MORELLO_RELATIVE	\*ABS\*\+0x10
     1024:	00000000 	.*
-    1028:	00000e20 	.*
+    1028:	PCC_LENGTH 	.*
     102c:	04000000 	.*
-    1030:	00000240 	.*
+    1030:	DAT_START 	.*
 			1030: R_MORELLO_RELATIVE	\*ABS\*
     1034:	00000000 	.*
-    1038:	0000000d 	.*
-    103c:	01000000 	.*
-    1040:	00000230 	.*
+    1038:	00000004 	.*
+    103c:	02000000 	.*
+    1040:	PCC_START 	.*
 			1040: R_MORELLO_RELATIVE	\*ABS\*
 	\.\.\.
     104c:	02000000 	.*
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-morello-7.ld b/ld/testsuite/ld-aarch64/emit-relocs-morello-7.ld
index 1402e98ef080a4b9d77fb91dbb22208e0cd0e28e..53294c012593e6ad4850a97492a3c00804e9c6e0 100644
--- a/ld/testsuite/ld-aarch64/emit-relocs-morello-7.ld
+++ b/ld/testsuite/ld-aarch64/emit-relocs-morello-7.ld
@@ -5,8 +5,11 @@ SECTIONS {
 	__text_start = .;
 	__text_other = .;
 	.text : { *(.text) }
-	__data_start = .;
 	__data_other = .;
+	/* Try and collect all read-only stuff so that the data symbols stay at
+	 * the start of the .data section.  */
+	.rodata : ONLY_IF_RO { *(.*) }
+	__data_start = .;
 	.data : { *(.data) }
 	. = ALIGN(0x1000);
 	.got : { *(.got) }
diff --git a/ld/testsuite/ld-aarch64/emit-relocs-morello-9.d b/ld/testsuite/ld-aarch64/emit-relocs-morello-9.d
index a9e1c3f37485df9d0ea9f2a52edab97cc9edf355..18ca9c98816a63713287809556c62d43be89f4bd 100644
--- a/ld/testsuite/ld-aarch64/emit-relocs-morello-9.d
+++ b/ld/testsuite/ld-aarch64/emit-relocs-morello-9.d
@@ -1,3 +1,6 @@
+# Checking that the LSB is set on all relocations to a function symbol where
+# the relocations are there to load an address into a register (rather than
+# jump to a relative address).
 #source: emit-relocs-morello-9.s
 #as: -march=morello+c64
 #ld: -static -Ttext-segment 0x0
@@ -8,26 +11,29 @@
 
 Disassembly of section \.text:
 
-0000000000000000 <_start>:
-   0:	f2800020 	movk	x0, #0x1
-   4:	f2800020 	movk	x0, #0x1
-   8:	30ffffc0 	adr	c0, 1 <_start\+0x1>
-   c:	30ffffa0 	adr	c0, 1 <_start\+0x1>
-  10:	02000400 	add	c0, c0, #0x1
-  14:	02000400 	add	c0, c0, #0x1
-  18:	d2800020 	mov	x0, #0x1                   	// #1
-  1c:	d2800020 	mov	x0, #0x1                   	// #1
-  20:	f2800020 	movk	x0, #0x1
-  24:	f2800020 	movk	x0, #0x1
+#record: TEXT_START
+([0-9a-f]+) <_start>:
+#check: LOBITS format %x [expr "0x$TEXT_START + 1"]
+.*:	........ 	movk	x0, #0xLOBITS
+.*:	........ 	movk	x0, #0xLOBITS
+.*:	........ 	adr	c0, LOBITS <_start\+0x1>
+.*:	........ 	adr	c0, LOBITS <_start\+0x1>
+.*:	........ 	add	c0, c0, #0xLOBITS
+.*:	........ 	add	c0, c0, #0xLOBITS
+.*:	........ 	mov	x0, #0xLOBITS .*
+.*:	........ 	mov	x0, #0xLOBITS .*
+.*:	........ 	movk	x0, #0xLOBITS
+.*:	........ 	movk	x0, #0xLOBITS
 
 Disassembly of section \.data:
 
+#check: LO8BITS aarch64_8digit_addr $TEXT_START 1
 .* <val>:
-   .*:	00000001 	.word	0x00000001
-   .*:	00000001 	.word	0x00000001
-   .*:	00000001 	.word	0x00000001
+   .*:	LO8BITS 	.word	0xLO8BITS
+   .*:	LO8BITS 	.word	0xLO8BITS
+   .*:	LO8BITS 	.word	0xLO8BITS
    .*:	00000000 	.word	0x00000000
-   .*:	00000001 	.word	0x00000001
-   .*:	00000001 	.word	0x00000001
-   .*:	00000001 	.word	0x00000001
+   .*:	LO8BITS 	.word	0xLO8BITS
+   .*:	LO8BITS 	.word	0xLO8BITS
+   .*:	LO8BITS 	.word	0xLO8BITS
    .*:	00000000 	.word	0x00000000
diff --git a/ld/testsuite/ld-aarch64/morello-pcc-bounds-include-readonly.d b/ld/testsuite/ld-aarch64/morello-pcc-bounds-include-readonly.d
index 9c4aa81b9699a03dc4f661d86323a15532180d4f..1aa3f8e202d9f6fb74f721952980a2f6990be610 100644
--- a/ld/testsuite/ld-aarch64/morello-pcc-bounds-include-readonly.d
+++ b/ld/testsuite/ld-aarch64/morello-pcc-bounds-include-readonly.d
@@ -13,27 +13,31 @@
 #source: morello-pcc-bounds-include-readonly.s
 #as: -march=morello+c64
 #ld: -static -pie -T morello-pcc-bounds-include-readonly.ld
-#objdump: -j .data -j .text -j .othersection -DR
+#objdump: -DR --section-headers
 
 .*:     file format .*
 
+Sections:
+Idx Name          Size      VMA               LMA               File off  Algn
+.* \.text         00000010  00000000000001a0  00000000000001a0  000001a0  2\*\*5
+#record: LAST_RO_SIZE LAST_RO_VMA
+#...
+ +[0-9]+ \.rela\.dyn +([0-9a-f]+)  ([0-9a-f]+) .*
+ + CONTENTS, ALLOC, LOAD, READONLY, DATA
+ +[0-9]+ \.data .*
+#...
 
 Disassembly of section \.text:
 
 00000000000001a0 <obj>:
 #...
+Disassembly of section \.data:
 
-Disassembly of section .othersection:
-
-0000000000012000 <othersection_start>:
-#...
-
-Disassembly of section .data:
-
+#check: PCC_SIZE format %08x [expr "0x$LAST_RO_VMA + 0x$LAST_RO_SIZE - 0x1a0"]
 0000000000014000 <data_start>:
-   [0-9a-f]+:	000001a0 	udf	#416
+   [0-9a-f]+:	000001a0 	.*
 			14000: R_MORELLO_RELATIVE	\*ABS\*
-   [0-9a-f]+:	00000000 	udf	#0
-   [0-9a-f]+:	00011f00 	\.inst	0x00011f00 ; undefined
+   [0-9a-f]+:	00000000 	.*
+   [0-9a-f]+:	PCC_SIZE 	.*
    [0-9a-f]+:	04000000 	add	z0\.b, p0/m, z0\.b, z0\.b
 
diff --git a/ld/testsuite/ld-aarch64/morello-sizeless-global-syms.d b/ld/testsuite/ld-aarch64/morello-sizeless-global-syms.d
index 89c7963b789dba65b7bb00c07c7197bb5759a8d9..51877627255c2f41dd27e077c54424bc7ae47f38 100644
--- a/ld/testsuite/ld-aarch64/morello-sizeless-global-syms.d
+++ b/ld/testsuite/ld-aarch64/morello-sizeless-global-syms.d
@@ -9,34 +9,40 @@
 Disassembly of section \.data:
 
 [0-9a-f]+ <ptr3>:
-   [0-9a-f]+:	00010450.*
+#record: BSS_START
+   [0-9a-f]+:	([0-9a-f]+) .*
 			[0-9a-f]+: R_MORELLO_RELATIVE	\*ABS\*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	02000000.*
 
 [0-9a-f]+ <ptr2>:
-   [0-9a-f]+:	00010454.*
+#check: BAR_POS format %08x [expr "0x$BSS_START + 0x4"]
+   [0-9a-f]+:	BAR_POS .*
 			[0-9a-f]+: R_MORELLO_RELATIVE	\*ABS\*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	02000000.*
 
 [0-9a-f]+ <ptr1>:
-   [0-9a-f]+:	00010458.*
+#check: FOO_POS format %08x [expr "0x$BSS_START + 0x8"]
+   [0-9a-f]+:	FOO_POS .*
 			[0-9a-f]+: R_MORELLO_RELATIVE	\*ABS\*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	02000000.*
 
-Disassembly of section .bss:
+Disassembly of section \.bss:
 
-0000000000010450 <baz>:
+#check: BAZL_POS format %016x 0x$BSS_START
+#check: BARL_POS format %016x [expr "0x$BSS_START + 0x4"]
+#check: FOOL_POS format %016x [expr "0x$BSS_START + 0x8"]
+BAZL_POS <baz>:
    [0-9a-f]+:	00000000.*
 
-[0-9a-f]+ <bar>:
+BARL_POS <bar>:
    [0-9a-f]+:	00000000.*
 
-[0-9a-f]+ <foo>:
+FOOL_POS <foo>:
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	00000000.*
diff --git a/ld/testsuite/ld-aarch64/morello-sizeless-got-syms.d b/ld/testsuite/ld-aarch64/morello-sizeless-got-syms.d
index 82131d11dde1995214bff673c46d925facd2650b..06ed9d2af559ee7f10e22ca23092752dd664ef98 100644
--- a/ld/testsuite/ld-aarch64/morello-sizeless-got-syms.d
+++ b/ld/testsuite/ld-aarch64/morello-sizeless-got-syms.d
@@ -1,3 +1,8 @@
+# Checking that:
+#    1) Text references entries in the GOT which correspond to the relevant
+#       symbols.
+#    2) The size requested for those capabilities in the GOT is zero (matching
+#       the size of the symbols).
 #source: morello-sizeless-got-syms.s
 #as: -march=morello+c64
 #ld: -static -pie
@@ -8,18 +13,23 @@
 Disassembly of section \.text:
 
 [0-9a-f]+ <get_foo>:
- [0-9a-f]+:	90800080 	adrp	c0, 10000 .*
- [0-9a-f]+:	c240dc00 	ldr	c0, \[c0, #880\]
+#record: GOT_PAGE
+ [0-9a-f]+:	........ 	adrp	c0, ([0-9a-f]+) .*
+#record: FOO_OFFSET
+ [0-9a-f]+:	........ 	ldr	c0, \[c0, #([0-9]+)\]
  [0-9a-f]+:	c2c253c0 	ret	c30
 
+#check: GOTPAGE string tolower $GOT_PAGE
 [0-9a-f]+ <get_bar>:
- [0-9a-f]+:	90800080 	adrp	c0, 10000 .*
- [0-9a-f]+:	c240e000 	ldr	c0, \[c0, #896\]
+ [0-9a-f]+:	........ 	adrp	c0, GOTPAGE .*
+#record: BAR_OFFSET
+ [0-9a-f]+:	........ 	ldr	c0, \[c0, #([0-9]+)\]
  [0-9a-f]+:	c2c253c0 	ret	c30
 
 [0-9a-f]+ <get_baz>:
- [0-9a-f]+:	90800080 	adrp	c0, 10000 .*
- [0-9a-f]+:	c240d800 	ldr	c0, \[c0, #864\]
+ [0-9a-f]+:	........ 	adrp	c0, GOTPAGE .*
+#record: BAZ_OFFSET
+ [0-9a-f]+:	........ 	ldr	c0, \[c0, #([0-9]+)\]
  [0-9a-f]+:	c2c253c0 	ret	c30
 
 [0-9a-f]+ <_start>:
@@ -27,35 +37,44 @@ Disassembly of section \.text:
 
 Disassembly of section \.got:
 
-0000000000010350 <\.got>:
-   [0-9a-f]+:	.*
-   [0-9a-f]+:	.*
-   [0-9a-f]+:	.*
-   [0-9a-f]+:	.*
-   [0-9a-f]+:	000103c0 	.*
+#check: FOO_GOTPOS aarch64_page_plus_decimal_offset $GOT_PAGE $FOO_OFFSET
+#check: BAR_GOTPOS aarch64_page_plus_decimal_offset $GOT_PAGE $BAR_OFFSET
+#check: BAZ_GOTPOS aarch64_page_plus_decimal_offset $GOT_PAGE $BAZ_OFFSET
+[0-9a-f]+ <\.got>:
+ +[0-9a-f]+:	.*
+ +[0-9a-f]+:	.*
+ +[0-9a-f]+:	.*
+ +[0-9a-f]+:	.*
+#record: BAZPOS
+ +BAZ_GOTPOS:	([0-9a-f]+) 	.*
 			[0-9a-f]+: R_MORELLO_RELATIVE	\*ABS\*
-   [0-9a-f]+:	00000000 	.*
-   [0-9a-f]+:	00000000 	.*
-   [0-9a-f]+:	02000000 	.*
-   [0-9a-f]+:	000103c8 	.*
+ +[0-9a-f]+:	00000000 	.*
+ +[0-9a-f]+:	00000000 	.*
+ +[0-9a-f]+:	02000000 	.*
+#record: FOOPOS
+ +FOO_GOTPOS:	([0-9a-f]+) 	.*
 			[0-9a-f]+: R_MORELLO_RELATIVE	\*ABS\*
-   [0-9a-f]+:	00000000 	.*
-   [0-9a-f]+:	00000000 	.*
-   [0-9a-f]+:	02000000 	.*
-   [0-9a-f]+:	000103c4 	.*
+ +[0-9a-f]+:	00000000 	.*
+ +[0-9a-f]+:	00000000 	.*
+ +[0-9a-f]+:	02000000 	.*
+#record: BARPOS
+ +BAR_GOTPOS:	([0-9a-f]+) 	.*
 			[0-9a-f]+: R_MORELLO_RELATIVE	\*ABS\*
-   [0-9a-f]+:	00000000 	.*
-   [0-9a-f]+:	00000000 	.*
-   [0-9a-f]+:	02000000 	.*
+ +[0-9a-f]+:	00000000 	.*
+ +[0-9a-f]+:	00000000 	.*
+ +[0-9a-f]+:	02000000 	.*
 
 Disassembly of section .bss:
 
-00000000000103c0 <baz>:
+#check: FOO_LONG_POS format %016x 0x$FOOPOS
+#check: BAR_LONG_POS format %016x 0x$BARPOS
+#check: BAZ_LONG_POS format %016x 0x$BAZPOS
+BAZ_LONG_POS <baz>:
    [0-9a-f]+:	00000000 	.*
 
-[0-9a-f]+ <bar>:
+BAR_LONG_POS <bar>:
    [0-9a-f]+:	00000000 	.*
 
-[0-9a-f]+ <foo>:
+FOO_LONG_POS <foo>:
    [0-9a-f]+:	00000000 	.*
    [0-9a-f]+:	00000000 	.*
diff --git a/ld/testsuite/ld-aarch64/morello-sizeless-local-syms.d b/ld/testsuite/ld-aarch64/morello-sizeless-local-syms.d
index 2f74b7a643ded8078e206daf81b40997705926ba..0f0fbb586d0514ebf55e29a8e6448427c7223248 100644
--- a/ld/testsuite/ld-aarch64/morello-sizeless-local-syms.d
+++ b/ld/testsuite/ld-aarch64/morello-sizeless-local-syms.d
@@ -9,34 +9,40 @@
 Disassembly of section .data:
 
 [0-9a-f]+ <ptr3>:
-   [0-9a-f]+:	00010450.*
+#record: BSS_START
+   [0-9a-f]+:	([0-9a-f]+) .*
 			[0-9a-f]+: R_MORELLO_RELATIVE	\*ABS\*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	02000000.*
 
 [0-9a-f]+ <ptr2>:
-   [0-9a-f]+:	00010454.*
+#check: BAR_POS format %08x [expr "0x$BSS_START + 0x4"]
+   [0-9a-f]+:	BAR_POS .*
 			[0-9a-f]+: R_MORELLO_RELATIVE	\*ABS\*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	02000000.*
 
 [0-9a-f]+ <ptr1>:
-   [0-9a-f]+:	00010458.*
+#check: FOO_POS format %08x [expr "0x$BSS_START + 0x8"]
+   [0-9a-f]+:	FOO_POS .*
 			[0-9a-f]+: R_MORELLO_RELATIVE	\*ABS\*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	02000000.*
 
-Disassembly of section .bss:
+Disassembly of section \.bss:
 
-0000000000010450 <baz>:
+#check: BAZL_POS format %016x 0x$BSS_START
+#check: BARL_POS format %016x [expr "0x$BSS_START + 0x4"]
+#check: FOOL_POS format %016x [expr "0x$BSS_START + 0x8"]
+BAZL_POS <baz>:
    [0-9a-f]+:	00000000.*
 
-[0-9a-f]+ <bar>:
+BARL_POS <bar>:
    [0-9a-f]+:	00000000.*
 
-[0-9a-f]+ <foo>:
+FOOL_POS <foo>:
    [0-9a-f]+:	00000000.*
    [0-9a-f]+:	00000000.*